W83792AG Nuvoton Technology Corporation of America, W83792AG Datasheet - Page 44

• Manufacturer Part Number: W83792AG
• Description: IC MONITOR H/W 48-LQFP
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83792AG

• Output Type: I²C™
• Function: Hardware Monitor
• Topology: ADC, Fan Control, Register Bank
• Sensor Type: External
• Sensing Temperature: External Sensor
• Output Alarm: Yes
• Output Fan: Yes
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Temperature Sensor Function: Temp Sensor
• Resolution: 10b
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Continued.
8.9
An one represents corresponding channel have been exceed its limit.
TART will assert while target temperature cannot be achieved after 3 minutes full speed of
corresponding FAN. Read Interrupt Status will clear the interrupt flag.
8.10 SMI#/IRQ Mask Registers ⎯ Index 43h~45h 9Ch 9Dh(Bank 0)
These are SMI/IRQ mask registers. Set to one will disable the corresponding interrupt sources. Clear
to 0 will enable that interrupt source.
SMI Mask 2 bit 7 is CLR_CHS(Clear Chassis), write this bit with an one will clear internal caseopen
latch, and after latch is clear, CLR_CHS will be reset to 0 itself.
SMI/IRQ Mask 1
SMI/IRQ Mask 2
SMI/IRQ Mask 3
Interrupt Status 1
Interrupt Status 2
Interrupt Status 3
2
1
0
BIT
MNEMONIC
MNEMONIC
Interrupt Status Registers ⎯ Index 41h 42h 9Bh(Bank 0)
EN_IRQ
EN_SMI#
START
NAME
BANK INDEX ATTR
BANK INDEX ATTR BIT 7
0
0
0
0
0
0
R/W
R/W
R/W
ATTRIBUTE
9C
43
44
41
42
9B
RW
RW
RW
RO
RO
RO
CLR_CHS VIDCHG Chassis VDD
EN_IRQ are both set to 1, SMI# will override the IRQ output.
the analog part in Power-down mode.
Note: The outputs of Interrupt pins will not be cleared if the
user writes a zero to this location after an interrupt has
occurred unlike "INT_Clear'' bit.
FAN3
FAN7 VIDCHG Chassis 5VCC
FAN6
FAN3
FAN6
BIT 7
A one enables the IRQ Interrupt output.
A one enables the SMI# Interrupt output. If EN_SMI# and
A one enables startup of monitoring operations; a zero puts
0
0
0
FAN2
FAN5
BIT 6
FAN2
FAN5
BIT 6
- 38 -
0
0
0
FAN1
FAN4
BIT 5
FAN1 TEMP3 TEMP2 TEMP1 VcoreB VcoreA
FAN4
BIT 5
0
0
0
DESCRIPTION
TEMP3 TEMP2 TEMP1 VcoreB VcoreA
VBAT
BIT 4
VBAT
BIT 4
W83792AD/AG/D/G
0
0
0
BIT 3
VIN3
VSB
BIT 3
VIN3
VSB
0
0
0
TART3 TART2 TART1
BIT 2
TART3 TART2 TART1
VIN2
BIT 2
VIN2
0
0
0
BIT 1
VIN1
BIT 1
VIN1
0
0
0
BIT 0
VIN0
BIT 0
VIN0
0
0
0