W83792AG Nuvoton Technology Corporation of America, W83792AG Datasheet - Page 15

• Manufacturer Part Number: W83792AG
• Description: IC MONITOR H/W 48-LQFP
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83792AG

• Output Type: I²C™
• Function: Hardware Monitor
• Topology: ADC, Fan Control, Register Bank
• Sensor Type: External
• Sensing Temperature: External Sensor
• Output Alarm: Yes
• Output Fan: Yes
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Temperature Sensor Function: Temp Sensor
• Resolution: 10b
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Pin Description List, continued
THERMTRIP1#
THERMTRIP2#
FAN_OUT2
FAN_OUT1
PWRBTN#
PIN NAME
FANIN3
FANIN2
FANIN1
FANIN7
+5VSB
SDA
CLK
SCL
A1
A0
NO.
PIN
15
16
17
18
19
20
21
22
23
24
25
26
POWER
PLANE
5VSB
5VSB
5VSB
5VSB
5VSB
5VSB
5VSB
VDD
VDD
VDD
VDD
-
POWER
I/OD
OUT
TYPE
I/O
OD
IN
IN
IN
IN
IN
IN
IN
IN
IN
12t
ts
ts
ts
ts
ts
ts
ts
ts
ts
12ts
12
12
Fan speed control PWM/DC output. When the power
of VDD is 0v, this pin will drive logic 0. The power of
this pin is supplied by VSB 5V.
I
on.
Fan speed control PWM/DC output. When the power
of VDD is 0v, this pin will drive logic 0. The power of
this pin is supplied by VSB 5V.
I
on.
14.318MHz System clock while VCC5V powered up.
0V to +5V amplitude fan tachometer input
0V to +5V amplitude fan tachometer input
0V to +5V amplitude fan tachometer input
Serial Bus Clock.
Serial Bus bi-directional data.
Power Button output for enable/disable power supply.
This pin is power for W83792D/G. Bypass with the
parallel combination of 10μF (electrolytic or tantalum)
and 0.1μF (ceramic) bypass capacitors.
Thermal Trip signal from CPU A. Low Active.
0~+5V FANIN 7 tachometer.
Thermal Trip signal from CPU B. Low Active.
2
2
C device address bit 1 trapping during 5VSB power
C device address bit 0 trapping during 5VSB power
- 9 -
Publication Release Date: April 26, 2006
W83792AD/AG/D/G
DESCRIPTION
Revision 0.9