TLE6209R Infineon Technologies, TLE6209R Datasheet - Page 3

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TLE6209R

Manufacturer Part Number
TLE6209R
Description
IC H-BRIDGE 7A DC MOTOR PDSO-20
Manufacturer
Infineon Technologies
Type
Half Bridge DC Motor Driverr
Datasheet

Specifications of TLE6209R

Applications
DC Motor Driver, H Bridge
Number Of Outputs
1
Current - Output
6A
Voltage - Supply
4.4 V ~ 40 V
Operating Temperature
-40°C ~ 150°C
Mounting Type
Surface Mount
Package / Case
DSO-20
Operating Supply Voltage
5.2 V to 40 V
Supply Current
5 mA
Mounting Style
SMD/SMT
Packages
PG-DSO-20
Current Limit (min.)
5.95 A
Rthjc (max)
1.5 K/W
Quiescent Current (max.)
50 µA
Operating Range
5.2 - 40 V
Rds (on) (typ./switch)
140.0 mOhm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Load
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
SP000013299
SP000304414
TLE6209R
TLE6209RNT
TLE6209RT
TLE6209RTR
TLE6209RXT

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1.2.1
Pin No. Symbol Function
1, 10,
11, 20
2,3
4,17
5
6
7
8
9
12
13
14
15
Data Sheet, Version 3.2
GND
OUT1
V
SCLK
SDI
SDO
CSN
INH
DIS
DIR
PWM
V
S
CC
Pin Definitions and Functions
Ground; internally connected to cooling tab (heat slug); to reduce
thermal resistance place cooling areas and thermal vias on PCB.
Output 1; output of D-MOS half bridge 1; external connection
between pin 2 and pin 3 is necessary.
Power supply; needs a blocking capacitor as close as possible to
GND; 47 μF electrolytic in parallel to 220 nF ceramic is
recommended; external connection between pin 4 and pin 17 is
necessary.
Serial clock input; clocks the shiftregister; SCLK has an internal
active pull down and requires CMOS logic levels
Serial data input; receives serial data from the control device;
serial data transmitted to SDI is an 8 bit control word with the Least
Significant Bit (LSB) being transferred first; the input has an active
pull down and requires CMOS logic levels; SDI will accept data on
the falling edge of SCLK-signal; see Table 1 for input data protocol.
Serial-Data-Output; this tri-state output transfers diagnosis data to
the control device; the output will remain tri-stated unless the device
is selected by a low on Chip-Select-Not (CSN); SDO state changes
on the rising edge of SCLK; see Table 4 for diagnosis protocol.
Chip-Select-Not input; CSN is an active low input; serial
communication is enabled by pulling the CSN terminal low; CSN
input should only be transitioned when SCLK is low; CSN has an
internal active pull up and requires CMOS logic levels.
Inhibit input; has an internal pull down; device is switched in
standby condition by pulling the INH terminal low.
Disable input; has an internal pull up; the output stages are
switched in tristate condition by pulling the DIS terminal high.
Direction input; has an internal pull down; TTL/CMOS compatible
input.
PWM input; has an internal pull down; TTL/CMOS compatible
input.
Logic supply voltage; needs a blocking capacitor as close as
possible to GND; 10 μF electrolytic in parallel to 220 nF ceramic is
recommended.
3
TLE 6209 R
2010-09-10

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