ICB1FL03G Infineon Technologies, ICB1FL03G Datasheet - Page 7

• Manufacturer Part Number: ICB1FL03G
• Description: IC SMART BALLAST CONTROL DSO18
• Manufacturer: Infineon Technologies
• Type: PFC/Ballast Controllerr

Specifications of ICB1FL03G

• Frequency: 20 ~ 100 kHz
• Current - Supply: 5mA
• Voltage - Supply: 8.4 V ~ 17 V
• Operating Temperature: -25°C ~ 125°C
• Package / Case: 20-SOIC (0.300", 7.50mm Width) 18 leads
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output: -
• Lead Free Status / Rohs Status: Details

removal. A capacitor from this pin directly to ground
eliminates a superimposed AC voltage that is
generated as a voltage drop across the low-side
filament.
During typical start-up with connected filaments of the
lamp a current source I
Vcc> 10,5V and V
side filament is detected, when V
condition will prevent the start-up of the IC. In addition
the comparator threshold is set to V
the current source changes to I
system is waiting for a voltage level lower than V
at the RES-Pin that indicates a connected low-side
filament, which will enable the start-up of the IC.
An open high-side filament is detected when there is no
sink current I
V
conditions the current source at the RES-Pin is I
(41µA) as long as Vcc> 10,5V and V
and the current source is I
threshold has changed to V
detection of the high-side filament is mirrored to the
levels on the RES-Pin.
Finally there is a delay function implemented at the
RES-Pin. When a fault condition happens e.g. by an
end-of-life criteria the inverter is turned-off. In some
topologies a transient AC lamp voltage may occur
immediately after shut down of the Gate drives which
could be interpreted as a lamp removal. In order to
generate a delay for the detection of a lamp removal
the capacitor at the RES-Pin is charged by the I
(20µA) current source up to the threshold V
and discharged by an internal resistor R
operates in parallel to the external sense resistor at this
pin, to the threshold V
amounts to 32 of these cycles, which corresponds to a
delay time between 30ms to 100ms dependent on
capacitor value.
In addition this pin is applied to sense capacitive mode
operation by use of a further capacitor connected from
this pin to the nod of the high-side MOSFET’s Source
terminal and the low-side MOSFET’s Drain terminal.
The sense capacitor and the filter capacitor are acting
as a capacitive voltage divider that allows for detecting
voltage slopes versus timing sequence and therefore
indicating capacitive mode operation. A typical ratio of
the capacitive divider is 410V/2,2V which results in the
capacitor values e.g. of 10nF and 53pF (56pF).
LVS (Lamp voltage sense, Pin 13)
Before the IC enters the softstart mode this pin has to
sense a sink current above 26µA (max) which is fed via
resistors from the bus voltage across the high-side
filament of the fluorescent lamp in order to monitor the
existence of the filament for restart after lamp removal.
Together with RES (pin 12) the IC can monitor the lamp
removal of totally 2 lamps in series.
During run mode the lamp voltage is sensed by the AC
current fed into this pin via resistors. Exceeding one of
Preliminary Datasheet Version 1.02
CC
start-up threshold is reached. Under these
LVSsink
RES
(15µA) into the LVS-Pin before the
< V
RES3
RESC3
RESC1
RESC2
(20µA) is active as long as
(0,375V). The total delay
RES2
(1,6V). An open Low-
RES4
(1,3V). In this way the
RES
RES
(34µA) when the
> V
RESC2
(17µA). Now the
< V
RESdisch
RESC1
RESC1
RESC1
(1,3V) and
. Such a
, which
(1,6V)
(1,6V)
RESC2
RES1
RES3
7
the two thresholds of either +215µA or -215µA cycle by
cycle for longer than 610µs, the interpretation of this
event is a failure due to EOL1 (end-of-life). A rectifier
effect (EOL2) is assumed if the ratio of the sequence of
positive and negative amplitudes is above 1,15 or
below 0,85 for longer than 500ms. A failure due to
EOL1 or EOL2 changes the operating mode from run
mode into a latched fault mode that stops the operation
until a reset occurs by lamp removal or by cycle of
power.
EOL1 and EOL2 require an AC current with
zerocrossings at LVS-Pin for a reliable detection. A DC
current at LVS-Pin results in a definite turn-off action
acc. to EOL1 only if the sensed current exceeds the
threshold I
If the functionality of this pin is not required it can be
disabled by connecting this pin to ground.
Not Connected (Pin 14)
This pin is internally not connected.
HSGND (High side ground, Pin 17)
This pin is connected to the Source terminal of the
high-side MOSFET, which is also the nod of high-side
and low-side MOSFET. This pin represents the floating
ground level of the high-side driver and high-side
supply.
HSVCC (High side supply voltage, Pin 18)
This pin provides the power supply of the high-side
ground related section of the IC. An external capacitor
between pin 15 and 16 acts like a floating battery which
has to be recharged cycle by cycle via high voltage
diode from low-side supply voltage during on-time of
the low-side MOSFET. There is an UVLO threshold
with hysteresis that enables high-side section at 10,1V
and disables it at 8,4V.
HSGD (High side gate drive, Pin 19)
The Gate of the high-side MOSFET in a half-bridge
inverter topology is controlled by this pin. There is an
active L-level during UVLO and a limitation of the max.
H-level at 11V during normal operation. The switching
characteristics are the same as described for LSGD
(pin 2). It is recommended to use a resistor of about
15Ohm between drive pin and Gate in order to avoid
oscillations and in order to shift the power dissipation of
discharging the Gate capacitance into this resistor.
The dead time between LSGD signal and HSGD signal
is 1800ns typically.
HSGND (High side ground, Pin 20)
This pin is internally connected with pin 17.
Pin Configuration and Description
LVSEOLDC
= +/-175µA (typically).
ICB1FL03G
March 2009