ICB1FL03G Infineon Technologies, ICB1FL03G Datasheet - Page 11

• Manufacturer Part Number: ICB1FL03G
• Description: IC SMART BALLAST CONTROL DSO18
• Manufacturer: Infineon Technologies
• Type: PFC/Ballast Controllerr

Specifications of ICB1FL03G

• Frequency: 20 ~ 100 kHz
• Current - Supply: 5mA
• Voltage - Supply: 8.4 V ~ 17 V
• Operating Temperature: -25°C ~ 125°C
• Package / Case: 20-SOIC (0.300", 7.50mm Width) 18 leads
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output: -
• Lead Free Status / Rohs Status: Details

3.2
PFC is starting with a fixed frequent operation (ca. 25kHz), beginning with an on-time of 1µs and an off-time of
40µs. The on-time is enlarged every 400µs to a maximum on-time of 23µs. The control switches over into critical
conduction mode (CritCM) operation as soon as a sufficient ZCD signal is available. There is an overvoltage
threshold at 109% of rated Bus voltage that stops PFC Gate drive as long as the Bus voltage has reached a level
of 105% of rated Bus voltage again. The compensation of the voltage control loop is completely integrated. The
internal reference level of the Bus voltage sense (PFCVS) is 2,5V with high accuracy.
The PFC control operates in CritCM in the range of 23µs > on-time > 2,3µs. For lower loads the control operates
in discontinuous conduction mode (DCM) with an on-time down to 0,5µs and an increasing off-time. With this
control method the PFC preconverter covers a stable operation from 100% of load to 0,1% .
Figure 5
Overvoltage, undervoltage and open loop detection at pin PFCVS are sensed by analog comparators. The BUS
voltage loop control is provided by a 8bit sigma-delta A/D-Converter with a sampling rate of 400µs and a resolution
of 4mV/bit. So a range of +/- 0,5V from the reference level of 2,50V is covered. The digital error signal has to pass
a digital notch filter in order to suppress the AC voltage ripple of twice of the mains frequency. A subsequent error
amplifier with PI characteristic cares for stable operation of the PFC preconverter.
The zero current detection is sensed by a separate pin PFCZCD. The information of finished current flow during
demagnetization is required in CritCM and in DCM as well. The input is equipped with a special filtering including
a blanking of typically 500ns and is combined with a large hysteresis between the thresholds of typically 0,5V and
1,5V. In case of bad coupling between primary inductor winding and secondary ZCD-winding an additional filtering
by a capacitor at ZCD pin might be necessary in order to avoid mistriggering by long lasting oscillations during
switching slopes of the PFC MOSFET.
Figure 6
Preliminary Datasheet Version 1.02
PFC Preconverter
Circuit Diagram of the PFC preconverter section.
Structure of the mixed digital and analog control of PFC preconverter.
PFCVS
PE
90 ...
270 VAC
L101
SRate 400µs
C1
Res 4mV/bit
Σ∆-ADC
D1...4
109% +/-2,0%
C2
73% +/- 2,5%
Undervoltage
15% +/- 20%
Overvoltage
Open Loop
Detection
Notch
Filter
R2
R3
R1
L1
Q1
R11
R12
PI Loop
Control
R18R19
11
C10
D9
D5
C12
C11
R34
R16
R14
R15
R13
R20
1,50V / 0,5V
Overcurrent
Pulse width
1,0V +/-5%
Generator
Protection
600kHz
Start-up
Clock
PFCZCD
PFCGD
PFCVS
PFCCS
ZCD
R21R22R23
Reference
C13
+/-1,5%
HSVCC
HSGND
HSGD
LSGD
LSCS
Driver
2,50V
Gate
Functional Description
PFCZCD
PFCCS
PFCGD
ICB1FL03G
March 2009