ADE7754AR Analog Devices Inc, ADE7754AR Datasheet - Page 32

• Manufacturer Part Number: ADE7754AR
• Description: IC ENERY METER 3PHASE 24-SOIC
• Manufacturer: Analog Devices Inc

Specifications of ADE7754AR

• Input Impedance: 370 KOhm
• Measurement Error: 0.1%
• Voltage - I/o High: 2.4V
• Voltage - I/o Low: 0.8V
• Current - Supply: 7mA
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-SOIC (0.300", 7.50mm Width)
• Meter Type: 3 Phase
• For Use With: EVAL-ADE7754EBZ - BOARD EVALAUTION FOR ADE7754
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: AD71049AR; AD71049AR

ADE7754
Address
[A5:A0] Name
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
Reserved
AENERGY
RAENERGY
LAENERGY
VAENERGY
RVAENERGY R
LVAENERGY
PERIOD
TEMP
WFORM
OPMODE
MMODE
WAVMODE
WATMODE
VAMODE
IRQEN
STATUS
RSTATUS
ZXTOUT
R/W* Length
R
R
R
R
R
R
R
R
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R/W
24
24
24
8
8
8
8
16
16
16
24
24
24
15
8
24
8
16
Default
Value
0
0
0
0
0
0
0
0
0
4
70h
0
3Fh
3Fh
0
0
0
FFFFh
Table VIII. Register List
Description
Reserved.
Active Energy Register. Active power is accumulated over time in an inter-
nal register. The AENERGY register is a read-only register that reads this
internal register and can hold a minimum of 88 seconds of active energy
information with full-scale analog inputs before it overflows. See the Energy
Calculation section. Bits 7 to 3 of the WATMODE register determine how
the active energy is processed from the six analog inputs. See Table XIV.
Same as the AENERGY register, except that the internal register is reset
to 0 following a read operation.
Line Accumulation Active Energy Register. The instantaneous active power is
accumulated in this read-only register over the LINCYC number of half line
cycles. Bits 2 to 0 of the WATMODE register determine how the line accumu-
lation active energy is processed from the six analog inputs. See Table XIV.
VA Energy Register. Apparent power is accumulated over time in this
read-only register. Bits 7 to 3 of the VAMODE register determine how the
apparent energy is processed from the six analog inputs. See Table XV.
Same as the VAENERGY register except that the register is reset to 0
following a read operation.
Apparent Energy Register. The instantaneous apparent power is accu-
mulated in this read-only register over the LINCYC number of half line
cycles. Bits 2 to 0 of the VAMODE register determine how the apparent
energy is processed from the six analog inputs. See Table XV.
Period of the line input estimated by zero-crossing processing. Data Bit 0
and 1 and 4 to 6 of the MMODE register determine the voltage channel
used for period calculation. See Table XII.
Temperature Register. This register contains the result of the latest
temperature conversion. Refer to the Temperature Measurement section
for details on how to interpret the content of this register.
Waveform Register. This register contains the digitized waveform of one
of the six analog inputs. The source is selected by Data Bits 0 to 2 in the
WAVMode register. See Table XIII.
Operational Mode Register. This register defines the general configuration
of the ADE7754. See Table IX.
Measurement Mode Register. This register defines the channel used for
period and peak detection measurements. See Table XII.
Waveform mode register. This register defines the channel and sampling
frequency used in waveform sampling mode. See Table XIII.
This register configures the formula applied for the active energy and
line active energy measurements. See Table XIV.
This register configures the formula applied for the apparent energy and
line apparent energy measurements. See Table XV.
IRQ Enable Register. It determines whether an interrupt event will
generate an active low output at IRQ pin. See Table XVI.
IRQ Status Register. This register contains information regarding the
source of ADE7754 interrupts. See Table XVII.
Same as the status register, except that its contents are reset to 0 (all
flags cleared) after a read operation.
Zero Cross Timeout Register. If no zero crossing is detected within a
time period specified by this register, the interrupt request line (IRQ)
will go active low for the corresponding line voltage. The maximum
timeout period is 2.3 seconds. See the Zero-Crossing Detection section.
–32–
REV. 0