MAX7456EUI+ Maxim Integrated Products, MAX7456EUI+ Datasheet - Page 33

IC ON-SCREEN DISPLAY 28-TSSOP

MAX7456EUI+

Manufacturer Part Number
MAX7456EUI+
Description
IC ON-SCREEN DISPLAY 28-TSSOP
Manufacturer
Maxim Integrated Products
Type
OSD (On-Screen Display) Video Generatorr
Datasheet

Specifications of MAX7456EUI+

Applications
Security Systems, Video Routing
Mounting Type
Surface Mount
Package / Case
28-TSSOP Exposed Pad, 28-eTSSOP, 28-HTSSOP
Current - Supply
58mA
Voltage - Supply
4.75 V ~ 5.25 V
Operating Temperature
-40°C ~ 85°C
Interface
SPI Serial
Display Type
OSD
Digits Or Characters
256 Characters
Maximum Clock Frequency
27 MHz
Operating Supply Voltage
5 V
Maximum Power Dissipation
2162 mW
Maximum Operating Temperature
+ 85 C
Maximum Supply Current
25 mA
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Configuration
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Write address = 08H, read address = 88H.
Read/write access: unrestricted.
X = Don’t care.
Character Memory Mode Register (CMM)
BIT
7–0
DEFAULT
0000 0000
______________________________________________________________________________________
Single-Channel Monochrome On-Screen
Only whole characters (54 bytes) can be written to or read from the nonvolatile character memory
(NVM) at one time. This is done through the (64 byte) shadow RAM (Figure 13). The shadow RAM is
accessed through the SPI port one byte at a time. The shadow RAM is written to and read from
NVM by the following procedures:
Writing to NVM
1010 XXXX = Write to NVM array from shadow RAM.
The 64 bytes from shadow RAM are written to the NVM array at the character-memory address
location (CMAH, CMAL) (Figure 13). The character memory is busy for approximately 12ms during
this operation. During this time, STAT[5] is automatically set to 1. The Character Memory Mode
register is cleared and STAT[5] is reset to 0 after the write operation has been completed. The user
does not need to write zeros afterwards.
Reading from NVM
0101 XXXX = Read from NVM array into shadow RAM.
The 64 bytes corresponding to the character-memory address (CMAH, CMAL) are read from the
NVM array into the shadow RAM (Figure 13). The character memory is busy for approximately 0.5µs
during this operation. The CMM register is cleared after the operation is completed. The user does
not need to write zeros afterwards. During this time, STAT[5] is automatically set to 1. STAT[5] is
reset to 0 when the read operation has been complete.
If the display has been enabled (VM0[3] = 1) or the character memory is busy (STAT[5] = 1), NVM
read/write operation commands are ignored and the corresponding registers are not updated.
However, all the registers can be read at any time.
For all the character-memory operations, the character address is formed with Character Memory
Address High (CMAH[7:0]) and Character Memory Address Low (CMAL[7:0]) register bits (Figures
11, 12, and 13).
Display with Integrated EEPROM
To write to this register, the following conditions must
be met:
1) STAT[5] = 0, the character memory (NVM) is not
2) VM0[3] = 0, the OSD is disabled.
busy.
FUNCTION
33

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