MAX7456EUI+ Maxim Integrated Products, MAX7456EUI+ Datasheet - Page 23

• Manufacturer Part Number: MAX7456EUI+
• Description: IC ON-SCREEN DISPLAY 28-TSSOP
• Manufacturer: Maxim Integrated Products
• Type: OSD (On-Screen Display) Video Generatorr

Specifications of MAX7456EUI+

• Applications: Security Systems, Video Routing
• Mounting Type: Surface Mount
• Package / Case: 28-TSSOP Exposed Pad, 28-eTSSOP, 28-HTSSOP
• Current - Supply: 58mA
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Interface: SPI Serial
• Display Type: OSD
• Digits Or Characters: 256 Characters
• Maximum Clock Frequency: 27 MHz
• Operating Supply Voltage: 5 V
• Maximum Power Dissipation: 2162 mW
• Maximum Operating Temperature: + 85 C
• Maximum Supply Current: 25 mA
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Configuration: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Figure 22. Power-On Reset Sequence
The MAX7456 features a Software Reset bit (VM0[1])
that, when set high, clears the display memory and
resets all registers to their default values except the
OSD Black Level register (OSDBL). After 100µs (typi-
cal), STAT[6] can be polled to verify that the reset
process is complete.
The MAX7456 provides a hardware reset input (RESET)
that functions the same as the POR. All registers are
OSCILLATOR
REGISTER
MEMORY
VOLTAGE
DISPLAY
SUPPLY
CLEAR
RESET
4.75V
XTAL
SPI
0V
POWER
______________________________________________________________________________________
ON
Single-Channel Monochrome On-Screen
POWER
STABLE
Hardware Reset
Display with Integrated EEPROM
Software Reset
50ms
50ms
STABLE
CLOCK
reset to their default values and are not accessible for
reading/writing when RESET is driven low. The resetting
process requires a ≥ 50ms wide RESET pulse, and no
other activities are allowed during this interval. All SPI
registers are reset to their default values 100µs after the
rising edge of RESET. The display memory is reset to
its default value of 00H in all locations 20µs after the ris-
ing edge of RESET. RESET takes precedence over the
Software Reset bit. After RESET has been deasserted,
STAT[6] can be polled to verify that the reset sequence
is complete.
RESET START
POWER-ON
20μs
100μs
POR DEFAULT
STATE
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