NCP1280DR2 ON Semiconductor, NCP1280DR2 Datasheet - Page 14

IC CTRLR PWM PROG OVP HV 16SOIC

NCP1280DR2

Manufacturer Part Number
NCP1280DR2
Description
IC CTRLR PWM PROG OVP HV 16SOIC
Manufacturer
ON Semiconductor
Datasheet

Specifications of NCP1280DR2

Output Isolation
Isolated
Frequency Range
140 ~ 320kHz
Voltage - Input
7 ~ 25 V
Operating Temperature
-40°C ~ 150°C
Package / Case
16-SOIC (0.154", 3.90mm Width)
Number Of Outputs
Dual Output
Topology
Forward, Half-Bridge
Output Voltage
- 0.3 V to + 18.3 V
Output Current
10 mA
Switching Frequency
315 KHz, 158 KHz
Duty Cycle (max)
80 %
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Fall Time
12 ns
Mounting Style
SMD/SMT
Rise Time
30 ns
Synchronous Pin
No
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
NCP1280DR2G
Manufacturer:
ON/安森美
Quantity:
20 000
Current Limit
cycle by cycle and cycle skip. It allows the NCP1280 to
handle momentary and hard shorts differently for the best
tradeoff in performance and safety. The outputs are disabled
typically 90 ns after a current limit fault is detected.
(reducing the duty cycle) if the voltage on the CS pin
exceeds 0.48 V. If the voltage on the CS pin exceeds 0.57 V,
the converter enters the cycle skip (CSKIP) mode. While in
the CSKIP mode, the soft−start capacitor is discharged and
the converter is disabled by a time determined by the CSKIP
timer.
11 V, a soft−start sequence commences. The possible
minimum OFF time is set by C
OFF time is generally greater than C
cycle skip period added to the time it takes V
11 V.
Oscillator
external resistor connected between the R
The oscillator is designed to operate up to 500 kHz.
The NCP1280 has two overcurrent protection modes,
The cycle by cycle mode terminates the conduction cycle
Once the cycle skip period is complete and V
The NCP1280 oscillator frequency is set by a single
CS Voltage
V
V
AUX(on)
AUX(off)
OUT2
OUT1
V
I
I
LIM2
LIM1
AUX
0 V
0 V
0 V
0 V
0 V
OPERATION
NORMAL
Cycle Skip
Voltage
CSKIP
CSKIP
Figure 32. Overcurrent Faults Timing Diagram
. However, the actual
I
LIM1
T
because it is the
pin and GND.
I
AUX
LIM2
AUX
to reach
reaches
http://onsemi.com
RESET
T
CSKIP
14
capacitor on the CSKIP pin (C
with a constant current source of 12.3 mA. The cycle skip
period ends when the voltage on the cycle skip capacitor
reaches 2.0 V. The cycle skip capacitor is calculated using
the equation below:
requires a cycle skip capacitor of 68 pF. The differences
between the cycle by cycle and cycle skip modes are
observed in Figure 32.
manufacturing to 1.3 V for an R
by R
10 pF capacitor as shown in Figure 2. The period ends
(capacitor is discharged) once the Oscillator Ramp reaches
2.0 V. If R
slope decrease, thus reducing the frequency. If R
the opposite effect is obtained. Figure 16 shows the
relationship between R
The CSKIP timer is set by immediately discharging the
Using the above equation, a cycle skip period of 11.0 ms
The voltage on the R
T
generates an Oscillator Ramp by charging an internal
T
SOFT−START
increases, the current and the Oscillator Ramp
C CSKIP [
T
T
and the oscillator frequency.
pin is laser trim adjusted during
T CSKIP
CSKIP
T
OPERATION
of 101 kW. A current set
NORMAL
2 V
), and then charging it
12.3 mA
T
decreases,

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