L6566B STMicroelectronics, L6566B Datasheet - Page 19

• Manufacturer Part Number: L6566B
• Description: IC CTRLR OVP OTP UVLO HV 16SOIC
• Manufacturer: STMicroelectronics

Specifications of L6566B

• Output Isolation: Isolated
• Frequency Range: 10 ~ 300kHz
• Voltage - Input: 8 ~ 23 V
• Power (watts): 750mW
• Operating Temperature: -40°C ~ 150°C
• Package / Case: 16-SOIC (0.154", 3.90mm Width)
• Output Current: 800 mA
• Output Power: 750 mW
• Input Voltage: 8 V to 23 V
• Operating Temperature Range: - 40 C to + 150 C
• Mounting Style: SMD/SMT
• Duty Cycle (max): 75 %
• Selectable Multi-mode Operation: fixed frequency or quasi-resonant
• For Use With: 497-6452 - BOARD EVAL FOR L6566B497-6451 - BOARD EVAL FOR L6566B497-6450 - BOARD EVAL FOR L6566B497-6449 - BOARD EVAL FOR L6566A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

L6566B
With reference to the timing diagram of
the voltage on the bulk capacitor (Vin) builds up and, at about 80 V, the HV generator is
enabled to operate (HV_EN is pulled high) so that it draws about 1 mA. This current, minus
the device’s consumption, charges the bypass capacitor connected from pin Vcc (5) to
ground and makes its voltage rise almost linearly.
Figure 6.
As the Vcc voltage reaches the turn-on threshold (14 V typ.) the device starts operating and
the HV generator is cut off by the Vcc_OK signal asserted high. The device is powered by
the energy stored in the Vcc capacitor until the self-supply circuit (typically an auxiliary
winding of the transformer and a steering diode) develops a voltage high enough to sustain
the operation. The residual consumption of this circuit is just the one on the 15 MΩ resistor
(≈10 mW at 400 Vdc), typically 50-70 times lower, under the same conditions, as compared
to a standard start-up circuit made with external dropping resistors.
At converter power-down the system will lose regulation as soon as the input voltage is so
low that either peak current or maximum duty cycle limitation is tripped. Vcc will then drop
and stop IC activity as it falls below the UVLO threshold (10 V typ.). The Vcc_OK signal is
de-asserted as the Vcc voltage goes below a threshold VCC
generator can now restart. However, if Vin < Vin
asserted too and the HV generator is disabled. This prevents converter’s restart attempts
and ensures monotonic output voltage decay at power-down in systems where brownout
protection (see the relevant section) is not used.
The low restart threshold VCC
the device will have a very low repetition rate, as shown in the timing diagram of
page 20
Vcc_OK
(pin 5)
(pin 4)
HV_EN
Vcc
0.85 mA
V
I
Vcc
Vcc
GD
charge
HVstart
Vcc
restart
Vin
OFF
ON
, and that the converter will work safely with extremely low power throughput.
Timing diagram: normal power-up and power-down sequences
Power-on
rest
ensures that, during short circuits, the restart attempts of
Figure 6
, when power is first applied to the converter
start
operation
Normal
, as illustrated in
rest
located at about 5V. The HV
Application information
Figure 6
Power-off
regulation is lost here
, HV_EN is de-
Figure 7 on
19/51
t
t
t
t
t
t