NCP1216AP100G ON Semiconductor, NCP1216AP100G Datasheet - Page 13

IC CTRLR PWM CM OTP HV 8DIP

NCP1216AP100G

Manufacturer Part Number
NCP1216AP100G
Description
IC CTRLR PWM CM OTP HV 8DIP
Manufacturer
ON Semiconductor
Datasheet

Specifications of NCP1216AP100G

Output Isolation
Isolated
Frequency Range
90 ~ 110kHz
Voltage - Input
10 ~ 16 V
Operating Temperature
0°C ~ 150°C
Package / Case
8-DIP (0.300", 7.62mm), 7 Leads
Duty Cycle (max)
50 %
Mounting Style
Through Hole
Switching Frequency
110 KHz
Maximum Operating Temperature
+ 150 C
Fall Time
20 ns
Rise Time
60 ns
Synchronous Pin
No
Topology
Flyback
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Manufacturer:
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3. Implement Figure 3, from AN8069/D, Solution: This is
another possible option to keep the DSS functionality (good
short−circuit protection and EMI jittering) while driving any
types of MOSFETs. This solution is recommended when the
designer plans to use SOIC−8 controllers.
4. Connect an Auxiliary Winding: If the mains conditions
are such that you simply can’t match the maximum power
dissipation, then you need to connect an auxiliary winding
to permanently disconnect the startup source.
Overload Operation
controlled (e.g. wall adapters delivering raw DC level), it is
interesting to implement a true short−circuit protection. A
short−circuit actually forces the output voltage to be at a low
level, preventing a bias current to circulate in the
Optocoupler LED. As a result, the FB pin level is pulled up
to 4.2 V, as internally imposed by the IC. The peak current
setpoint goes to the maximum and the supply delivers a
rather high power with all the associated effects. Please note
that this can also happen in case of feedback loss, e.g. a
broken Optocoupler. To account for this situation, NCP1216
hosts a dedicated overload detection circuitry. Once
activated, this circuitry imposes to deliver pulses in a burst
If the fault is relaxed during the V
sequence, the IC automatically resumes.
If the fault still persists when V
controller cuts everything off until recovery.
In applications where the output current is purposely not
VCC
VCC
VCC
OFF
ON
latch
= 10 V
= 12.2 V
= 5.6 V
12.2 V
5.6 V
10 V
Fault Flag
CC
Internal
V
Drv
CC
reached VCC
Startup Phase
CC
natural fall down
Occurs Here
Regulation
ON
Pulses
Driver
, then the
http://onsemi.com
Figure 25.
Fault Occurs Here
Latchoff
Phase
13
manner with a low duty−cycle. The system auto−recovers
when the fault condition disappears.
maximum until the output voltage reaches its target and the
feedback loop takes over. This period of time depends on
normal output load conditions and the maximum peak
current allowed by the system. The time−out used by this IC
works with the V
V
device internally watches for an overload current situation.
If this condition is still present when the VCC
reached, the controller stops the driving pulses, prevents the
self−supply current source to restart and puts all the circuitry
in standby, consuming as little as 350 mA typical (I
parameter). As a result, the V
toward 0 V. When this level crosses 5.6 V typical, the
controller enters a new startup phase by turning the current
source on: V
output pulses at the VCC
condition has been removed before VCC
then the IC continues its normal operation. Otherwise, a new
fault cycle takes place. Figure 25 shows the evolution of the
signals in presence of a fault.
Calculating the VCC Capacitor
depends upon the V
V
CC
CC
During the startup phase, the peak current is pushed to the
As the above section describes, the fall down sequence
decreases from the VCC
line to go from 12.2 V to 10 V. The required time
Fault is
Relaxed
Pulses
Driver
CC
rises toward 12.2 V and again delivers
CC
CC
decoupling capacitor: as soon as the
level: how long does it take for the
Time
Time
Time
OFF
OFF
CC
crossing point. If the fault
level (typically 12.2 V) the
level slowly discharges
ON
approaches,
ON
level is
CC3

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