M95010-WMN6P STMicroelectronics, M95010-WMN6P Datasheet - Page 9

• Manufacturer Part Number: M95010-WMN6P
• Description: IC EEPROM 1KBIT 10MHZ 8SOIC
• Manufacturer: STMicroelectronics

Specifications of M95010-WMN6P

• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Memory Size: 1K (128 x 8)
• Speed: 10MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• Memory Configuration: 128 X 8
• Interface Type: Serial, SPI
• Clock Frequency: 10MHz
• Supply Voltage Range: 2.5V To 5.5V
• Memory Case Style: SO
• No. Of Pins: 8
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-8600-5; M95010-WMN6P

OPERATING FEATURES
Power-up
When the power supply is turned on, V
from V
During this time, the Chip Select (S) must be al-
lowed to follow the V
lowed to float, but should be connected to V
a suitable pull-up resistor.
As a built in safety feature, Chip Select (S) is edge
sensitive as well as level sensitive. After Power-
up, the device does not become selected until a
falling edge has first been detected on Chip Select
(S). This ensures that Chip Select (S) must have
been High, prior to going Low to start the first op-
eration.
Power-down
At Power-down, the device must be deselected.
Chip Select (S) should be allowed to follow the
voltage applied on V
Active Power and Standby Power Modes
When Chip Select (S) is Low, the device is select-
ed, and in the Active Power mode. The device
consumes I
17..
When Chip Select (S) is High, the device is dese-
lected. If an Erase/Write cycle is not currently in
progress, the device then goes in to the Standby
Figure 6. Hold Condition Activation
SS
HOLD
to V
C
CC
CC
, as specified in
.
CC
CC
.
voltage. It must not be al-
Table 13.
Condition
CC
to
Hold
CC
Table
rises
via
Power mode, and the device consumption drops
to I
Hold Condition
The Hold (HOLD) signal is used to pause any se-
rial communications with the device without reset-
ting the clocking sequence.
During the Hold condition, the Serial Data Output
(Q) is high impedance, and Serial Data Input (D)
and Serial Clock (C) are Don’t Care.
To enter the Hold condition, the device must be
selected, with Chip Select (S) Low.
Normally, the device is kept selected, for the whole
duration of the Hold condition. Deselecting the de-
vice while it is in the Hold condition, has the effect
of resetting the state of the device, and this mech-
anism can be used if it is required to reset any pro-
cesses that had been in progress.
The Hold condition starts when the Hold (HOLD)
signal is driven Low at the same time as Serial
Clock (C) already being Low (as shown in
6.).
The Hold condition ends when the Hold (HOLD)
signal is driven High at the same time as Serial
Clock (C) already being Low.
Figure 6.
and falling edges are not timed to coincide with
Serial Clock (C) being Low.
CC1
.
also shows what happens if the rising
Condition
M95040, M95020, M95010
Hold
AI02029D
Figure
9/37