M95010-WMN6P STMicroelectronics, M95010-WMN6P Datasheet - Page 6

IC EEPROM 1KBIT 10MHZ 8SOIC

M95010-WMN6P

Manufacturer Part Number
M95010-WMN6P
Description
IC EEPROM 1KBIT 10MHZ 8SOIC
Manufacturer
STMicroelectronics
Datasheets

Specifications of M95010-WMN6P

Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
1K (128 x 8)
Speed
10MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Memory Configuration
128 X 8
Interface Type
Serial, SPI
Clock Frequency
10MHz
Supply Voltage Range
2.5V To 5.5V
Memory Case Style
SO
No. Of Pins
8
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-8600-5
M95010-WMN6P

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M95010-WMN6P
Manufacturer:
ST
0
M95040, M95020, M95010
SIGNAL DESCRIPTION
During all operations, V
within the specified valid range: V
V
All of the input and output signals can be held High
or Low (according to voltages of V
V
signals are described next.
Serial Data Output (Q). This output signal is
used to transfer data serially out of the device.
Data is shifted out on the falling edge of Serial
Clock (C).
Serial Data Input (D). This input signal is used to
transfer data serially into the device. It receives in-
structions, addresses, and the data to be written.
Values are latched on the rising edge of Serial
Clock (C).
Serial Clock (C). This input signal provides the
timing of the serial interface. Instructions, address-
es, or data present at Serial Data Input (D) are
latched on the rising edge of Serial Clock (C). Data
on Serial Data Output (Q) changes after the falling
edge of Serial Clock (C).
6/37
CC
OL
, as specified in
(max).
Table 13.
CC
must be held stable and
to
Table
IH
, V
17.). These
CC
OH
(min) to
, V
IL
or
Chip Select (S). When this input signal is High,
the device is deselected and Serial Data Output
(Q) is at high impedance. Unless an internal Write
cycle is in progress, the device will be in the Stand-
by Power mode. Driving Chip Select (S) Low se-
lects the device, placing it in the Active Power
mode.
After Power-up, a falling edge on Chip Select (S)
is required prior to the start of any instruction.
Hold (HOLD). The Hold (HOLD) signal is used to
pause any serial communications with the device
without deselecting the device.
During the Hold condition, the Serial Data Output
(Q) is high impedance, and Serial Data Input (D)
and Serial Clock (C) are Don’t Care.
To start the Hold condition, the device must be se-
lected, with Chip Select (S) driven Low.
Write Protect (W). This input signal is used to
control whether the memory is write protected.
When Write Protect (W) is held Low, writes to the
memory are disabled, but other operations remain
enabled. Write Protect (W) must either be driven
High or Low, but must not be left floating.

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