CY7C1338G-117AXC Cypress Semiconductor Corp, CY7C1338G-117AXC Datasheet - Page 9

• Manufacturer Part Number: CY7C1338G-117AXC
• Description: IC SRAM 4MBIT 117MHZ 100LQFP
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C1338G-117AXC

• Format - Memory: RAM
• Memory Type: SRAM - Synchronous
• Memory Size: 4M (128K x 32)
• Speed: 117MHz
• Interface: Parallel
• Voltage - Supply: 3.15 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Document #: 38-05521 Rev. *A
Thermal Resistance
Capacitance
AC Test Loads and Waveforms
Switching Characteristics
ΘJA
ΘJC
C
C
C
t
Clock
t
t
t
Output Times
t
t
Shaded areas contain advance information.
Notes:
10. Tested initially and after any design or process change that may affect these parameters.
11. This part has a voltage regulator internally; t
12. t
13. At any given voltage and temperature, t
14. This parameter is sampled and not 100% tested.
15. Timing reference level is 1.5V when V
16. Test conditions shown in (a) of AC Test Loads unless otherwise noted.
POWER
CYC
CH
CL
CDV
DOH
3.3V I/O Test Load
IN
CLK
I/O
OUTPUT
OUTPUT
2.5V I/O Test Load
Parameter
Parameter
can be initiated.
data bus. These specifications do not imply a bus contention condition, but reflect parameters guaranteed over worst case user conditions. Device is designed
to achieve High-Z prior to Low-Z under the same system conditions.
CHZ
Parameter
, t
CLZ
,t
OELZ
, and t
[10]
Z
Z
0
0
V
Clock Cycle Time
Clock HIGH
Clock LOW
Data Output Valid After CLK Rise
Data Output Hold After CLK Rise
Thermal Resistance
(Junction to Ambient)
Thermal Resistance
(Junction to Case)
= 50Ω
= 50Ω
DD
OEHZ
(Typical) to the first Access
are specified with AC test conditions shown in part (b) of AC Test Loads. Transition is measured ± 200 mV from steady-state voltage.
Input Capacitance
Clock Input Capacitance
Input/Output Capacitance
(a)
(a)
V
V
[10]
Description
T
T
= 1.25V
= 1.5V
R
R
DDQ
L
L
Description
OEHZ
Over the Operating Range
= 50Ω
= 50Ω
= 3.3V and is 1.25V when V
POWER
Description
is less than t
OUTPUT
OUTPUT
3.3V
2.5V
is the time that the power needs to be supplied above V
INCLUDING
INCLUDING
JIG AND
JIG AND
Test conditions follow standard test
methods and procedures for
measuring thermal impedance, per
EIA / JESD51.
SCOPE
SCOPE
OELZ
[11]
PRELIMINARY
5 pF
5 pF
and t
CHZ
Test Conditions
T
V
A
DDQ
DD
(b)
(b)
is less than t
= 25°C, f = 1 MHz,
Test Conditions
R = 317Ω
R = 1667Ω
= 3.3V. V
[11, 12, 13, 14, 15, 16]
= 2.5V.
R = 351Ω
R =1538Ω
CLZ
DDQ
to eliminate bus contention between SRAMs when sharing the same
Min.
7.5
2.5
2.5
2.0
= 3.3V
133 MHz
1
V
GND
GND
DDQ
V
Max.
DDQ
6.5
≤ 1ns
≤ 1ns
TQFP Package
TQFP Package
DD
10%
10%
(minimum) initially before a read or write operation
Min.
TBD
TBD
8.5
3.0
3.0
2.0
1
117 MHz
5
5
5
ALL INPUT PULSES
ALL INPUT PULSES
Max.
90%
90%
7.5
(c)
(c)
BGA Package
BGA Package Unit
Min.
CY7C1338G
4.0
4.0
2.0
10
100 MHz
1
TBD
TBD
5
5
7
Max.
8.0
Page 9 of 17
90%
90%
10%
10%
≤ 1ns
≤ 1ns
Unit
°C/W
°C/W
Unit
ms
ns
ns
ns
ns
ns
pF
pF
pF