M48Z35AV-10MH6E STMicroelectronics, M48Z35AV-10MH6E Datasheet - Page 4

IC NVSRAM 256KBIT 100NS 28SOIC

M48Z35AV-10MH6E

Manufacturer Part Number
M48Z35AV-10MH6E
Description
IC NVSRAM 256KBIT 100NS 28SOIC
Manufacturer
STMicroelectronics
Type
NVSRAMr
Datasheets

Specifications of M48Z35AV-10MH6E

Format - Memory
RAM
Memory Type
NVSRAM (Non-Volatile SRAM)
Memory Size
256K (32K x 8)
Speed
100ns
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC, 28-SOH (8.48mm Width)
Word Size
8b
Organization
32Kx8
Density
256Kb
Interface Type
Parallel
Access Time (max)
100ns
Operating Supply Voltage (typ)
3.3V
Package Type
SOH
Operating Temperature Classification
Industrial
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Operating Temp Range
-40C to 85C
Pin Count
28
Mounting
Surface Mount
Supply Current
50mA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
497-2881-5
M48Z35AV-10MH6

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M48Z35AV-10MH6E
Manufacturer:
ST
0
M48Z35AY, M48Z35AV
SUMMARY DESCRIPTION
The M48Z35AY/V ZEROPOWER
Kbit x 8, non-volatile static RAM that integrates
power-fail deselect circuitry and battery control
logic on a single die. The monolithic chip is avail-
able in two special packages to provide a highly in-
tegrated battery backed-up memory solution.
The M48Z35AY/V is a non-volatile pin and func-
tion equivalent to any JEDEC standard 32K x8
SRAM. It also easily fits into many ROM, EPROM,
and EEPROM sockets, providing the non-volatility
of PROMs without any requirement for special
WRITE timing or limitations on the number of
WRITEs that can be performed. The 28 pin 600mil
DIP CAPHAT™ houses the M48Z35AY/V silicon
with a long life lithium button cell in a single pack-
age.
Figure 3. Logic Diagram
4/21
A0-A14
W
G
E
15
V CC
M48Z35AY
M48Z35AV
V SS
®
8
RAM is a 32
DQ0-DQ7
AI02781B
The 28-pin, 330mil SOIC provides sockets with
gold plated contacts at both ends for direct con-
nection to a separate SNAPHAT
taining the battery. The unique design allows the
SNAPHAT battery package to be mounted on top
of the SOIC package after the completion of the
surface mount process. Insertion of the SNAPHAT
housing after reflow prevents potential battery
damage due to the high temperatures required for
device surface-mounting. The SNAPHAT housing
is keyed to prevent reverse insertion.
The SOIC and battery packages are shipped sep-
arately in plastic anti-static tubes or in Tape & Reel
form.
For the 28-lead SOIC, the battery package (e.g.,
SNAPHAT) part number is “M4Z28-BR00SH1.”
Table 1. Signal Names
DQ0-DQ7
A0-A14
V
V
W
G
E
CC
SS
Address Inputs
Data Inputs / Outputs
Chip Enable Input
Output Enable Input
WRITE Enable Input
Supply Voltage
Ground
®
housing con-

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