LH5164AN-10L Sharp Microelectronics, LH5164AN-10L Datasheet - Page 7

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LH5164AN-10L

Manufacturer Part Number
LH5164AN-10L
Description
IC SRAM 64KBIT 100NS 28SOP
Manufacturer
Sharp Microelectronics
Datasheet

Specifications of LH5164AN-10L

Rohs Status
RoHS non-compliant
Format - Memory
RAM
Memory Type
SRAM
Memory Size
64K (8K x 8)
Speed
100ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-10°C ~ 70°C
Package / Case
28-SOP
Other names
425-1831-5

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CMOS 64K (8K
NOTES:
1. The writing occurs during an overlapping period of CE
2. t
3. t
4. t
5. If CE
6. While I/O pins are in the output state, input signals with the opposite logic level must not be applied.
to the time when the writing is finished.
outputs will remain high-impedance.
CW
AS
WR
is defined as the time from address change to writing start.
is defined as the time from the last occuring transition, either CE
is defined as the time from writing finish to address change.
1
LOW transition or CE
A
0
8) Static RAM
D
- A
CE
CE
WE
OUT
D
OE
12
IN
1
2
2
HIGH transition occurs at the same time or after WE LOW transition, the
(NOTE 5)
(NOTE 6)
(NOTE 3)
Figure 6. Write Cycle 1
t
AS
1
= 'LOW,' CE
t
OHZ
t
AW
t
WC
2
1
= 'HIGH,' and WE = 'LOW' (t
LOW transition or CE
(NOTE 2)
t
CW
t
CW
(NOTE 1)
HIGH-Z
t
WP
t
DW
(NOTE 4)
DATA VALID
2
t
t
WR
WR
t
WR
HIGH transition,
t
DH
WP
).
LH5164A/AH
5164A-4
7

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