AT45DB321D-SU Atmel, AT45DB321D-SU Datasheet - Page 28
![IC FLASH 32MBIT 66MHZ 8SOIC](/photos/6/50/65032/453-8-soic_sml.jpg)
AT45DB321D-SU
Manufacturer Part Number
AT45DB321D-SU
Description
IC FLASH 32MBIT 66MHZ 8SOIC
Manufacturer
Atmel
Datasheet
1.AT45DB321D-MU.pdf
(57 pages)
Specifications of AT45DB321D-SU
Format - Memory
FLASH
Memory Type
DataFLASH
Memory Size
32M (8192 pages x 528 bytes)
Speed
66MHz
Interface
SPI, RapidS
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
Package
8SOIC EIAJ
Density
32 Mb
Architecture
Sectored
Block Organization
Symmetrical
Typical Operating Supply Voltage
3.3 V
Sector Size
64KByte x 64
Timing Type
Synchronous
Interface Type
Serial-SPI
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Maximum Operating Current
15 mA
Mounting Style
SMD/SMT
Organization
528 B x 8192
Memory Configuration
8192 Pages X 528 Bytes
Clock Frequency
66MHz
Supply Voltage Range
2.7V To 3.6V
Memory Case Style
SOIC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT45DB321D-SU
Manufacturer:
ATMEL
Quantity:
15 000
Company:
Part Number:
AT45DB321D-SU
Manufacturer:
ATMEL
Quantity:
1 000
Company:
Part Number:
AT45DB321D-SU
Manufacturer:
Atmel
Quantity:
7 530
Company:
Part Number:
AT45DB321D-SU
Manufacturer:
ATMEL
Quantity:
3
Part Number:
AT45DB321D-SU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
AT45DB321D-SU-2.5
Manufacturer:
ON
Quantity:
31 000
Part Number:
AT45DB321D-SU-SL955
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
15. Command Tables
28
AT45DB321D
Group D commands consist of:
If a Group A command is in progress (not fully completed), then another command in Group A,
B, C, or D should not be started. However, during the internally self-timed portion of Group B
commands, any command in Group C can be executed. The Group B commands using buffer 1
should use Group C commands using buffer 2 and vice versa. Finally, during the internally self-
timed portion of a Group D command, only the Status Register Read command should be
executed.
Table 15-1.
Table 15-2.
Command
Main Memory Page Read
Continuous Array Read (Legacy Command)
Continuous Array Read (Low Frequency)
Continuous Array Read (High Frequency)
Buffer 1 Read (Low Frequency)
Buffer 2 Read (Low Frequency)
Buffer 1 Read
Buffer 2 Read
Command
Buffer 1 Write
Buffer 2 Write
Buffer 1 to Main Memory Page Program with Built-in Erase
Buffer 2 to Main Memory Page Program with Built-in Erase
Buffer 1 to Main Memory Page Program without Built-in Erase
Buffer 2 to Main Memory Page Program without Built-in Erase
Page Erase
Block Erase
Sector Erase
Chip Erase
Main Memory Page Program Through Buffer 1
Main Memory Page Program Through Buffer 2
1. Erase Sector Protection Register
2. Program Sector Protection Register
3. Sector Lockdown
4. Program Security Register
Read Commands
Program and Erase Commands
C7H, 94H, 80H, 9AH
3597O–DFLASH–10/09
Opcode
Opcode
7CH
D2H
E8H
0BH
D1H
D3H
D4H
D6H
84H
87H
83H
86H
88H
89H
81H
50H
82H
85H
03H