AT45DB321D-SU Atmel, AT45DB321D-SU Datasheet - Page 16
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AT45DB321D-SU
Manufacturer Part Number
AT45DB321D-SU
Description
IC FLASH 32MBIT 66MHZ 8SOIC
Manufacturer
Atmel
Datasheet
1.AT45DB321D-MU.pdf
(57 pages)
Specifications of AT45DB321D-SU
Format - Memory
FLASH
Memory Type
DataFLASH
Memory Size
32M (8192 pages x 528 bytes)
Speed
66MHz
Interface
SPI, RapidS
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
Package
8SOIC EIAJ
Density
32 Mb
Architecture
Sectored
Block Organization
Symmetrical
Typical Operating Supply Voltage
3.3 V
Sector Size
64KByte x 64
Timing Type
Synchronous
Interface Type
Serial-SPI
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Maximum Operating Current
15 mA
Mounting Style
SMD/SMT
Organization
528 B x 8192
Memory Configuration
8192 Pages X 528 Bytes
Clock Frequency
66MHz
Supply Voltage Range
2.7V To 3.6V
Memory Case Style
SOIC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT45DB321D-SU
Manufacturer:
ATMEL
Quantity:
15 000
Company:
Part Number:
AT45DB321D-SU
Manufacturer:
ATMEL
Quantity:
1 000
Company:
Part Number:
AT45DB321D-SU
Manufacturer:
Atmel
Quantity:
7 530
Company:
Part Number:
AT45DB321D-SU
Manufacturer:
ATMEL
Quantity:
3
Part Number:
AT45DB321D-SU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
AT45DB321D-SU-2.5
Manufacturer:
ON
Quantity:
31 000
Part Number:
AT45DB321D-SU-SL955
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Figure 9-3.
16
CS
SI
AT45DB321D
Program Sector Protection Register
Each transition
represents 8 bits
Opcode
Byte 1
After the last data byte has been clocked in, the CS pin must be deasserted to initiate the inter-
nally self-timed program cycle. The programming of the Sector Protection Register should take
place in a time of t
the device is powered-down during the program cycle, then the contents of the Sector Protection
Register cannot be guaranteed.
If the proper number of data bytes is not clocked in before the CS pin is deasserted, then the
protection status of the sectors corresponding to the bytes not clocked in can not be guaranteed.
For example, if only the first two bytes are clocked in instead of the complete 62 bytes, then the
protection status of the last 62 sectors cannot be guaranteed. Furthermore, if more than
64 bytes of data is clocked into the device, then the data will wrap back around to the beginning
of the register. For instance, if 65 bytes of data are clocked in, then the 65th byte will be stored at
byte location 0 of the Sector Protection Register.
If a value other than 00H or FFH is clocked into a byte location of the Sector Protection Register,
then the protection status of the sector corresponding to that byte location cannot be guaran-
teed. For example, if a value of 17H is clocked into byte location 2 of the Sector Protection
Register, then the protection status of sector 2 cannot be guaranteed.
The Sector Protection Register can be reprogrammed while the sector protection enabled or dis-
abled. Being able to reprogram the Sector Protection Register with the sector protection enabled
allows the user to temporarily disable the sector protection to an individual sector rather than dis-
abling sector protection completely.
The Program Sector Protection Register command utilizes the internal SRAM buffer 1 for pro-
cessing. Therefore, the contents of the buffer 1 will be altered from its previous state when this
command is issued.
Command
Program Sector Protection Register
Opcode
Byte 2
P
, during which time the Status Register will indicate that the device is busy. If
Opcode
Byte 3
Opcode
Byte 4
Data Byte
Byte 1
n
3DH
Data Byte
n + 1
Byte 2
2AH
Data Byte
Byte 3
n + 63
7FH
3597O–DFLASH–10/09
Byte 4
FCH