DS28EC20+ Maxim Integrated Products, DS28EC20+ Datasheet - Page 21

• Manufacturer Part Number: DS28EC20+
• Description: IC EEPROM 20KBIT TO92-3
• Manufacturer: Maxim Integrated Products

Specifications of DS28EC20+

• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Memory Size: 20K (256 x 80)
• Interface: 1-Wire Serial
• Operating Temperature: -40°C ~ 85°C
• Package / Case: TO-92-3 (Standard Body), TO-226
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply: -
• Speed: -

1-Wire SIGNALING
The DS28EC20 requires strict protocols to ensure data integrity. The protocol consists of four types of signaling on
one line: reset sequence with reset pulse and presence pulse, write-zero, write-one, and read-data. Except for the
presence pulse, the bus master initiates all falling edges. The DS28EC20 can communicate at two different
speeds: standard speed and overdrive speed. If not explicitly set into the Overdrive mode, the DS28EC20
communicates at standard speed. While in Overdrive mode the fast timing applies to all waveforms. For operation
at overdrive speed, the DS28EC20 requires V
To get from idle to active, the voltage on the 1-Wire line needs to fall from V
from active to idle, the voltage needs to rise from V
make this rise is seen in Figure 10 as ε, and its duration depends on the pullup resistor (R
capacitance of the 1-Wire network attached. The voltage V
logical level, not triggering any events.
Figure 10 shows the initialization sequence required to begin any communication with the DS28EC20. A reset
pulse followed by a presence pulse indicates that the DS28EC20 is ready to receive data, given the correct ROM
and memory function command. If the bus master uses slew-rate control on the falling edge, it must pull down the
line for t
returning the device to standard speed. If the DS28EC20 is in Overdrive mode and t
device remains in Overdrive mode. If the device is in Overdrive mode and t
device resets, but the communication speed is undetermined.
Figure 10. Initialization Procedure: Reset and Presence Pulse
After the bus master has released the line it goes into Receive mode. Now the 1-Wire bus is pulled to V
the pullup resistor, or in case of a DS2482-x00 or DS2480B driver, by active circuitry. When the threshold V
crossed, the DS28EC20 waits for t
a presence pulse, the master must test the logical state of the 1-Wire line at t
The t
DS28EC20 is ready for data communication. In a mixed population network, t
480µs at standard speed and 48µs at overdrive speed to accommodate other 1-Wire devices.
Read-/Write-Time Slots
Data communication with the DS28EC20 takes place in time slots, which carry a single bit each. Write-time slots
transport data from bus master to slave. Read-time slots transfer data from slave to master. Figure 11 illustrates
the definitions of the write- and read-time slots.
All communication begins with the master pulling the data line low. As the voltage on the 1-Wire line falls below the
threshold V
during a write-time slot and how long data is valid during a read-time slot.
RSTH
RSTL
window must be at least the sum of t
V
TL
IHMASTER
, the DS28EC20 starts its internal timing generator that determines when the data line is sampled
+ t
V
V
ILMAX
V
F
V
PUP
0V
TH
TL
to compensate for the edge. A t
t
F
RESISTOR
MASTER TX “RESET PULSE” MASTER RX “PRESENCE PULSE”
PDH
and then transmits a presence pulse by pulling the line low for t
t
RSTL
PUP
PDHMAX
to be 5V ±5%.
ILMAX
RSTL
21 of 27
, t
past the threshold V
MASTER
PDLMAX
duration of 480µs or longer exits the Overdrive mode,
ILMAX
ε
, and t
is relevant for the DS28EC20 when determining a
t
PDH
RECMIN
t
MSP
t
PDL
. Immediately after t
t
RSTH
MSP
TH
RSTL
RSTH
PUP
. The time it takes for the voltage to
.
is between 80µs and 480µs, the
should be extended to minimum
below the threshold V
RSTL
DS28EC20
t
REC
is no longer than 80µs, the
RSTH
PUP
) used and the
is expired, the
PDL
PUP
. To detect
TL
. To get
through
TH
is