M95640-RMB6TG STMicroelectronics, M95640-RMB6TG Datasheet - Page 30
![IC EEPROM 64KBIT 2MHZ 8MLP](/photos/14/26/142612/stm_ufdfpn8_sml.jpg)
M95640-RMB6TG
Manufacturer Part Number
M95640-RMB6TG
Description
IC EEPROM 64KBIT 2MHZ 8MLP
Manufacturer
STMicroelectronics
Specifications of M95640-RMB6TG
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
64K (8K x 8)
Speed
2MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-MLP
Memory Configuration
8192 X 8
Interface Type
Serial, SPI
Clock Frequency
2MHz
Supply Voltage Range
1.8V To 5.5V
Memory Case Style
DFN
No. Of Pins
8
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
M95640-RMB6TGCT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M95640-RMB6TG
Manufacturer:
ST
Quantity:
20 000
DC and AC parameters
Table 17.
1. These timings are offered with grade3 devices referenced with “/PC” process letters only (see the last digits in the
2. t
3. Value guaranteed by characterization, not 100% tested in production.
4. t
30/44
Symbol
t
t
t
t
t
t
t
QLQH
QHQL
CLCH
CHCL
SHQZ
CLQV
HLQZ
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
HHCH
HHQV
numbering).
equal to (or greater than) t
SHCH
CHSH
DVCH
CHDX
HLCH
CLHH
CLQX
SLCH
SHSL
CHSL
CH
CL
CLHL
CH
CLQV
t
f
W
C
(2)
(2)
+ t
(3)
(3)
(4)
(3)
(3)
(3)
(3)
must be compatible with t
CL
must never be lower than the shortest possible clock period, 1/f
t
t
f
t
t
CSS1
CSS2
t
t
AC characteristics (M95320, device grade 3)
Alt.
t
t
t
t
SCK
t
CSH
t
t
DSU
t
t
t
CLH
CLL
t
DIS
WC
RC
DH
HO
RO
CS
FC
t
FO
HZ
LZ
V
Clock frequency
S active setup time
S not active setup time
S deselect time
S active hold time
S not active hold time
Clock high time
Clock low time
Clock rise time
Clock fall time
Data in setup time
Data in hold time
Clock low hold time after HOLD not active
Clock low hold time after HOLD active
Clock low set-up time before HOLD active
Clock low set-up time before HOLD not active
Output disable time
Clock low to output valid
Output hold time
Output rise time
Output fall time
HOLD high to output valid
HOLD low to output high-Z
Write time
CLQV
Test conditions specified in
; in all other cases, t
CL
(clock low time): if the SPI bus master offers a Read setup time t
Parameter
Doc ID 5711 Rev 12
CL
must be equal to (or greater than) t
Table 10
C
(max).
and
Min.
D.C.
100
90
90
90
90
90
90
20
30
70
40
0
0
0
Table 11
Max.
M95320, M95320-W, M95320-R
100
100
60
50
50
50
1
5
5
1
CLQV
+t
Min.
SU
D.C.
30
30
40
30
30
42
40
10
10
30
30
0
0
0
SU
.
(1)
= 0 ns, t
Max.
10
40
40
40
40
40
40
2
2
5
CL
(1)
can be
Part
MHz
Unit
ms
ns
ns
ns
ns
ns
ns
ns
µs
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns