M95640-RMC6TG STMicroelectronics, M95640-RMC6TG Datasheet

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M95640-RMC6TG

Manufacturer Part Number
M95640-RMC6TG
Description
EEPROM 64Kbit SPI EEPROM 20 MHz 1.8V to 5.5V
Manufacturer
STMicroelectronics
Datasheet

Specifications of M95640-RMC6TG

Product Category
EEPROM
Rohs
yes

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Part Number
Manufacturer
Quantity
Price
Part Number:
M95640-RMC6TG
Manufacturer:
ST
Quantity:
3 100
Features
September 2012
This is information on a product in full production.
Compatible with the Serial Peripheral Interface
(SPI) bus
Memory array
– 64 Kb (8 Kbytes) of EEPROM
– Page size: 32 bytes
Write
– Byte Write within 5 ms
– Page Write within 5 ms
Additional Write lockable page (Identification
page)
Write Protect: quarter, half or whole memory
array
High-speed clock: 20 MHz
Single supply voltage:
– 2.5 V to 5.5 V for M95640-W
– 1.8 V to 5.5 V for M95640-R
– 1.7 V to 5.5 V for M95640-DF
Operating temperature range: from -40°C up to
+85°C
Enhanced ESD protection
More than 4 million Write cycles
More than 200-year data retention
Packages
– RoHS compliant and halogen-free
(ECOPACK
®
)
64-Kbit serial SPI bus EEPROM with high-speed clock
Doc ID 16877 Rev 16
M95640-W M95640-R
2 x 3 mm (MLP8)
UFDFPN8 (MC)
TSSOP8 (DW)
150 mil width
169 mil width
SO8 (MN)
Datasheet
M95640-DF
production data
www.st.com
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Related parts for M95640-RMC6TG

M95640-RMC6TG Summary of contents

Page 1

... Write Protect: quarter, half or whole memory array ■ High-speed clock: 20 MHz ■ Single supply voltage: – 2 5.5 V for M95640-W – 1 5.5 V for M95640-R – 1 5.5 V for M95640-DF ■ Operating temperature range: from -40° +85°C ■ Enhanced ESD protection ■ ...

Page 2

... Active Power and Standby Power modes . . . . . . . . . . . . . . . . . . . . . . . . . 14 5.3 Hold condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5.4 Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.5 Data protection and protocol control . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6 Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 6.1 Write Enable (WREN 6.2 Write Disable (WRDI 6.3 Read Status Register (RDSR 6.3.1 2/ Operating supply voltage Device reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Power-up conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Power-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 WIP bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Doc ID 16877 Rev 16 M95640-W M95640-R M95640-DF ...

Page 3

... Write to Memory Array (WRITE 6.6.1 6.7 Read Identification Page (available only in M95640-D devices 6.8 Write Identification Page (available only in M95640-D devices 6.9 Read Lock Status (available only in M95640-D devices 6.10 Lock ID (available only in M95640-D devices Power-up and delivery state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 7.1 Power-up state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 7.2 Initial delivery state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 8 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . and AC parameters ...

Page 4

... Table 18. DC characteristics (M95640-DF, device grade 6 Table 19. AC characteristics (M95640-W, device grade Table 20. AC characteristics (M95640-R, device grade Table 21. AC characteristics (M95640-DF, device grade Table 22. SO8N – 8-lead plastic small outline, 150 mils body width, mechanical data . . . . . . . . . . . 42 Table 23. TSSOP8 – ...

Page 5

... M95640-W M95640-R M95640-DF List of figures Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 2. 8-pin package connections (top view Figure 3. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 4. Bus master and memory devices on the SPI bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 5. SPI modes supported . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 6. Hold condition activation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 7. Write Enable (WREN) sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 8. Write Disable (WRDI) sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 9 ...

Page 6

... SPI bus. The M95640-W can operate with a supply voltage from 2 5.5 V, the M95640-R can operate with a supply voltage from 1 5.5 V, and the M95640-DF can operate with a supply voltage from 1 5.5 V, over an ambient temperature range of -40 °C / +85 °C. ...

Page 7

... M95640-W M95640-R M95640-DF Figure 2. 8-pin package connections (top view) 1. See Section 10: Package mechanical data M95xxx HOLD AI01790D section for package dimensions, and how to identify pin 1. Doc ID 16877 Rev 16 Description 7/47 ...

Page 8

... Memory organization 2 Memory organization The memory is organized as shown in the following figure. Figure 3. Block diagram 8/47 M95640-W M95640-R M95640-DF Doc ID 16877 Rev 16 ...

Page 9

... M95640-W M95640-R M95640-DF 3 Signal description During all operations (min (max All of the input and output signals must be held high or low (according to voltages specified described next. 3.1 Serial Data Output (Q) This output signal is used to transfer data serially out of the device. Data is shifted out on the falling edge of Serial Clock (C) ...

Page 10

... Status Register). This pin must be driven either high or low, and must be stable during all Write instructions. 3.7 V supply voltage the supply voltage. CC 3.8 V ground the reference for all signals, including the V SS 10/47 M95640-W M95640-R M95640-DF supply voltage. CC Doc ID 16877 Rev 16 ...

Page 11

... M95640-W M95640-R M95640-DF 4 Connecting to the SPI bus All instructions, addresses and input data bytes are shifted in to the device, most significant bit first. The Serial Data Input (D) is sampled on the first rising edge of the Serial Clock (C) after Chip Select (S) goes low. ...

Page 12

... Stand-by mode and not transferring data: ● C remains at 0 for (CPOL=0, CPHA=0) ● C remains at 1 for (CPOL=1, CPHA=1) Figure 5. SPI modes supported CPOL CPHA 12/47 MSB Doc ID 16877 Rev 16 M95640-W M95640-R M95640-DF Figure 5, is the clock polarity when the MSB AI01438B ...

Page 13

... M95640-W M95640-R M95640-DF 5 Operating features 5.1 Supply voltage (V 5.1.1 Operating supply voltage V Prior to selecting the memory and issuing instructions to it, a valid and stable V within the specified [V in Section 9: DC and AC end of the transmission of the instruction and, for a Write instruction, until the completion of the internal write cycle (t ...

Page 14

... In the specific case where the device has shifted in a Write command (Inst + Address + data bytes, each data byte being exactly 8 bits), deselecting the device also triggers the Write cycle of this decoded command. 14/ (a)(b) Hold condition Figure 6). Doc ID 16877 Rev 16 M95640-W M95640-R M95640-DF supply voltage below the minimum CC Section 9: DC and AC Section 9: DC and AC parameters). Hold condition ), CC ai02029E ...

Page 15

... M95640-W M95640-R M95640-DF The Hold condition ends when the Hold (HOLD) signal is driven high when Serial Clock (C) is already low. Figure 6 also shows what happens if the rising and falling edges are not timed to coincide with Serial Clock (C) being low. 5.4 Status Register The Status Register contains a number of status and control bits that can be read or set (as appropriate) by specific instructions ...

Page 16

... Write to Memory Array Reads the page dedicated to identification. Writes the page dedicated to identification. Reads the lock status of the Identification Page. Locks the Identification page in read-only mode. Doc ID 16877 Rev 16 M95640-W M95640-R M95640-DF Table 3. Table 3), the device automatically Instruction format 0000 0110 ...

Page 17

... M95640-W M95640-R M95640-DF 6.1 Write Enable (WREN) The Write Enable Latch (WEL) bit must be set prior to each WRITE and WRSR instruction. The only way to do this is to send a Write Enable instruction to the device. As shown in Figure and the bits of the instruction byte are shifted in, on Serial Data Input (D). The device then enters a wait state ...

Page 18

... WRDI instruction execution ● WRSR instruction completion ● WRITE instruction completion. Figure 8. Write Disable (WRDI) sequence 18/ send this instruction to the device, Chip Select (S) is driven low Instruction D High Impedance Q Doc ID 16877 Rev 16 M95640-W M95640-R M95640- AI03750D ...

Page 19

... M95640-W M95640-R M95640-DF 6.3 Read Status Register (RDSR) The Read Status Register (RDSR) instruction is used to read the Status Register. The Status Register may be read at any time, even while a Write or Write Status Register cycle is in progress. When one of these cycles is in progress recommended to check the Write In Progress (WIP) bit before sending a new instruction to the device ...

Page 20

... Figure 10 Instruction 7 High Impedance MSB Doc ID 16877 Rev 16 M95640-W M95640-R M95640-DF BP1 BP0 WEL Block Protect bits Write Enable Latch bit Write In Progress bit Status Register AI02282D b0 WIP ...

Page 21

... M95640-W M95640-R M95640-DF Driving the Chip Select (S) signal high at a byte boundary of the input data triggers the self- timed Write cycle that takes t and AC parameters). While the Write Status Register cycle is in progress, the Status Register may still be read to check the value of the Write in progress (WIP) bit: the WIP bit is 1 during the self-timed Write cycle t , and 0 when the Write cycle is complete ...

Page 22

... Address MSB Table 5, the most significant address bits are Don’t Care. Doc ID 16877 Rev 16 M95640-W M95640-R M95640- Data Out 1 Data Out MSB ...

Page 23

... M95640-W M95640-R M95640-DF When the highest address is reached, the address counter rolls over to zero, allowing the Read cycle to be continued indefinitely. The whole memory can, therefore, be read with a single READ instruction. The Read cycle is terminated by driving Chip Select (S) high. The rising edge of the Chip Select (S) signal can occur at any time during the cycle ...

Page 24

... Data Byte Table 5, the most significant address bits are Don’t Care. Doc ID 16877 Rev 16 M95640-W M95640-R M95640- Data Byte Data Byte ...

Page 25

... M95640-W M95640-R M95640-DF 6.6.1 Cycling with Error Correction Code (ECC) M95640-x and M95640-Dx devices identified by the process letter K offer an Error Correction Code (ECC) logic. The ECC is an internal logic function which is transparent for the SPI communication protocol. The ECC logic is implemented on each group of four EEPROM bytes single bit out of the four bytes happens to be erroneous during a Read operation, the ECC detects this bit and replaces it with the correct value ...

Page 26

... Instructions 6.7 Read Identification Page (available only in M95640-D devices) The Identification Page (32 bytes additional page which can be written and (later) permanently locked in Read-only mode. Reading this page is achieved with the Read Identification Page instruction (see The Chip Select signal (S) is first driven low, the bits of the instruction byte and address bytes are then shifted in, on Serial Data Input (D) ...

Page 27

... M95640-W M95640-R M95640-DF 6.8 Write Identification Page (available only in M95640-D devices) The Identification Page (32 bytes additional page which can be written and (later) permanently locked in Read-only mode. Writing this page is achieved with the Write Identification Page instruction (see Chip Select signal (S) is first driven low. The bits of the instruction byte, address bytes, and at least one data byte are then shifted in on Serial Data Input (D) ...

Page 28

... Instructions 6.9 Read Lock Status (available only in M95640-D devices) The Read Lock Status instruction (see Page is locked or not in Read-only mode. The Read Lock Status sequence is defined with the Chip Select (S) first driven low. The bits of the instruction byte and address bytes are then shifted in on Serial Data Input (D) ...

Page 29

... M95640-W M95640-R M95640-DF 6.10 Lock ID (available only in M95640-D devices) The Lock ID instruction permanently locks the Identification Page in read-only mode. Before this instruction can be accepted, a Write Enable (WREN) instruction must have been executed. The Lock ID instruction is issued by driving Chip Select (S) low, sending the instruction code, the address and a data byte on Serial Data Input (D), and driving Chip Select (S) high ...

Page 30

... Initial delivery state The device is delivered with the memory array set to all 1s (each byte = FFh). The Status Register Write Disable (SRWD) and Block Protect (BP1 and BP0) bits are initialized to 0. 30/47 M95640-W M95640-R M95640-DF Doc ID 16877 Rev 16 ...

Page 31

... M95640-W M95640-R M95640-DF 8 Maximum rating Stressing the device outside the ratings listed in the device. These are stress ratings only, and operation of the device at these, or any other conditions outside those indicated in the operating sections of this specification, is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability ...

Page 32

... CC T Ambient operating temperature A Table 10. Operating conditions (M95640-R, device grade 6) Symbol V Supply voltage CC T Ambient operating temperature A Table 11. Operating conditions (M95640-DF, device grade 6) Symbol V Supply voltage CC T Ambient operating temperature A Table 12. AC measurement conditions Symbol C Load capacitance L Input rise and fall times ...

Page 33

... M95640-W M95640-R M95640-DF Table 13. Capacitance Symbol C Output capacitance (Q) OUT Input capacitance ( Input capacitance (other pins) 1. Sampled only, not 100% tested Table 14. Cycling performance by groups of four bytes Symbol Parameter Ncycle Write cycle endurance 1. Cycling performance for products identified by process letter K. ...

Page 34

... DC and AC parameters Table 16. DC characteristics (M95640-W, device grade 6) Symbol Parameter Input leakage I LI current Output leakage I LO current Supply current I CC (Read) Supply current (2) I CC0 (Write) Supply current I CC1 (Standby) V Input low voltage IL V Input high voltage IH V Output low voltage ...

Page 35

... IH V Output low voltage OL V Output high voltage the application uses the M95640-R device with 2.5 V < characteristics (M95640-W, device grade 2. Only for M95640 devices identified by process letter K. 3. Characterized only, not tested in production. Test conditions in addition to those (1) defined in Table 10 ...

Page 36

... Input low voltage IL V Input high voltage IH V Output low voltage OL V Output high voltage the application uses the M95640-DF devices at 2 characteristics (M95640-W, device grade 2. Characterized only, not tested in production. 36/47 Test conditions in addition to those (1) defined in Table ...

Page 37

... M95640-W M95640-R M95640-DF Table 19. AC characteristics (M95640-W, device grade 6) Test conditions specified in Symbol Alt Clock frequency C SCK active setup time SLCH CSS1 not active setup time SHCH CSS2 deselect time SHSL active hold time CHSH ...

Page 38

... DC and AC parameters Table 20. AC characteristics (M95640-R, device grade 6) Test conditions specified in Symbol Alt. Parameter f f Clock frequency C SCK active setup time SLCH CSS1 not active setup time SHCH CSS2 deselect time SHSL active hold time CHSH ...

Page 39

... M95640-W M95640-R M95640-DF Table 21. AC characteristics (M95640-DF, device grade 6) Test conditions specified Clock frequency C SCK active setup time SLCH CSS1 not active setup time SHCH CSS2 deselect time SHSL active hold time CHSH CSH t S not active hold time ...

Page 40

... DC and AC parameters Figure 19. Serial input timing S tCHSL C tDVCH D Q Figure 20. Hold timing HOLD 40/47 tSLCH tCH tCHCL tCL tCHDX MSB IN High impedance tHLCH tCLHL tHLQZ Doc ID 16877 Rev 16 M95640-W M95640-R M95640-DF tSHSL tCHSH tSHCH tCLCH LSB IN tHHCH tCLHH tHHQV AI01448c AI01447d ...

Page 41

... M95640-W M95640-R M95640-DF Figure 21. Serial output timing S C tCLQV tCLCH tCLQX Q ADDR D LSB IN tCH tCHCL tCL tQLQH tQHQL Doc ID 16877 Rev 16 DC and AC parameters tSHSL tSHQZ AI01449f 41/47 ...

Page 42

... Doc ID 16877 Rev 16 M95640-W M95640-R M95640- 45˚ c 0.25 mm GAUGE PLANE SO-A (1) inches Typ Min 0.0039 0.0492 0.0110 0.0067 0.1929 0.1890 0.2362 ...

Page 43

... M95640-W M95640-R M95640-DF Figure 23. TSSOP8 – 8-lead thin shrink small outline, package outline Drawing is not to scale. Table 23. TSSOP8 – 8-lead thin shrink small outline, package mechanical data Symbol Values in inches are converted from mm and rounded to four decimal digits. ...

Page 44

... Doc ID 16877 Rev 16 M95640-W M95640-R M95640- must not be SS (1) inches Typ Min Max 0.0217 0.0177 0.0236 0.0008 0.0000 0.0020 0.0098 0.0079 0.0118 0.0787 0.0748 ...

Page 45

... M95640-W M95640-R M95640-DF 11 Part numbering Table 25. Ordering information scheme Example: Device type M95 = SPI serial access EEPROM Device function 640 = 64 Kbit (8192 x 8) 640 Kbit plus Identification page Operating voltage 2 1 1 Package MN = SO8 (150 mil width) ...

Page 46

... Table 27 (package, voltage range, temperature grade). 15 Updated MLP8 package data. Data sheet split into: – M95640-125 datasheet for automotive products (range 3), – M95640-W, M95640-R, M95640-DF (this datasheet) for standard products (range 6). Updated: – Cycling defined as 4 million cycles, Correction Code ...

Page 47

... M95640-W M95640-R M95640-DF Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...

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