IDT70V25L25PFGI8 IDT, Integrated Device Technology Inc, IDT70V25L25PFGI8 Datasheet - Page 13

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IDT70V25L25PFGI8

Manufacturer Part Number
IDT70V25L25PFGI8
Description
IC SRAM 128KBIT 25NS 100TQFP
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDT70V25L25PFGI8

Format - Memory
RAM
Memory Type
SRAM - Dual Port, Asynchronous
Memory Size
128K (8K x 16)
Speed
25ns
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
70V25L25PFGI8

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IDT70V25L25PFGI8
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
NOTES:
1. Transition is measured 0mV from Low or High-impedance voltage with the Output Test Load (Figure 2).
2. This parameter is guaranteed by device characterization, but is not production tested.
3. To access SRAM, CE = V
4. The specification for t
5. 'X' in part number indicates power rating (S or L).
AC Electrical Characteristics Over the Operating
Temperature and Supply Voltage for 70V25/24
WRITE CYCLE
t
t
t
t
t
t
t
t
t
t
t
t
t
WRITE CYCLE
t
t
t
t
t
t
t
t
t
t
t
t
t
WC
EW
AW
AS
WP
WR
DW
HZ
DH
WZ
OW
SWRD
SPS
WC
EW
AW
AS
WP
WR
DW
HZ
DH
WZ
OW
SWRD
SPS
IDT70V35/34S/L (IDT70V25/24S/L)
High-Speed 3.3V 8/4K x 18 (8/4K x 16) Dual-Port Static RAM
Symbol
Symbol
the entire t
voltage and temperature, the actual t
EW
Chip Enable to End-of-Write
Data Valid to End-of-Write
Output High-Z Time
Data Hold Time
Output Active from End-of-Write
Write Cycle Time
Address Valid to End-of-Write
Address Set-up Time
Write Pulse Width
Write Recovery Time
Write Enable to Output in High-Z
SEM Flag Write to Read Time
SEM Flag Contention Window
Write Cycle Time
Chip Enable to End-of-Write
Address Valid to End-of-Write
Address Set-up Time
Write Pulse Width
Write Recovery Time
Data Valid to End-of-Write
Output High-Z Time
Data Hold Time
Write Enable to Output in High-Z
Output Active from End-of-Write
SEM Flag Write to Read Time
SEM Flag Contention Window
time.
DH
must be met by the device supplying write data to the SRAM under all operating conditions. Although t
IL
(4)
(4)
, UB or LB = V
(1,2)
(1,2)
(3)
(3)
DH
(3)
(3)
will always be smaller than the actual t
(1,2,4)
IL
Parameter
(1,2,4)
(1,2)
(1,2)
, SEM = V
Parameter
IH
. To access semaphore, CE = V
6.42
13
OW
.
Min.
IH
____
____
15
12
12
12
10
70V25/24X15
0
0
0
0
5
5
Com'l Only
or UB & LB = V
Max.
Industrial and Commercial Temperature Ranges
____
____
____
____
____
____
____
____
____
____
____
(5)
10
10
IH
,
and SEM = V
Min.
Min.
____
____
____
____
20
15
15
15
15
35
30
30
25
15
70V25/24X20
70V25/24X35
0
0
0
0
5
5
0
0
0
0
5
5
Com'l Only
Com'l
& Ind
Max.
Max.
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
12
12
15
15
IL
. Either condition must be valid for
DH
and t
Min.
Min.
____
____
____
____
25
20
20
20
15
55
45
45
40
30
70V25/24X25
70V25/24X55
0
0
0
0
5
5
0
0
0
0
5
5
Com'l Only
OW
Com'l
& Ind
values will vary over
Max.
Max.
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
15
15
25
25
5624 tbl 12b
5624 tbl 12a
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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