NAND01GW3B2CN6E NUMONYX, NAND01GW3B2CN6E Datasheet - Page 29

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NAND01GW3B2CN6E

Manufacturer Part Number
NAND01GW3B2CN6E
Description
IC FLASH 1GBIT 48TSOP
Manufacturer
NUMONYX
Datasheets

Specifications of NAND01GW3B2CN6E

Format - Memory
FLASH
Memory Type
FLASH - Nand
Memory Size
1G (128M x 8)
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TSOP
Cell Type
NAND
Density
1Gb
Access Time (max)
25us
Interface Type
Parallel
Boot Type
Not Required
Address Bus
8b
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
TSOP
Program/erase Volt (typ)
2.7 to 3.6V
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8b
Number Of Words
128M
Supply Current
30mA
Mounting
Surface Mount
Pin Count
48
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Speed
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Compliant

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NAND01G-B2C
6.4
Figure 13. Copy back program
RB
I/O
Read
Code
00h
Copy back program
The copy back program operation is used to copy the data stored in one page and
reprogram it in another page.
The copy back program operation does not require external memory and so the operation is
faster and more efficient because the reading and loading cycles are not required. The
operation is particularly useful when a portion of a block is updated and the rest of the block
needs to be copied to the newly assigned block.
If the copy back program operation fails, an error is signalled by the pass/fail status.
However, if copy back operations are accumulated over time, a bit error due to charge loss is
not checked by an external error detection/correction scheme. For this reason it is
recommended to use a 2-bit error correction in a copy back operation.
The copy back program operation requires four steps:
1.
2.
3.
For an example of the copy back program operation, refer to
shows an example of Copy Back Program with Random Data Input.
A data input cycle to modify a portion or a multiple distant portion of the source page, is
shown in
The first step reads the source page. The operation copies all 1056 words/ 2112 bytes
from the page into the data buffer. It requires:
When the device returns to the ready state (Ready/Busy High), the user may read the
contents of the source page by toggling R. In this case, random data output is also
allowed. To proceed with the copy back of the page into the target location, the user will
issue 85h followed by 4 bus cycles to input the target page address (see
Table
Then the confirm command is issued to start the P/E/R controller.
Add Inputs
Source
Figure
one bus write cycle to setup the command
4 bus write cycles to input the source page address (see
one bus write cycle to issue the confirm command code
7).
(Read Busy time)
14.
tBLBH1
35h
Busy
Copy Back
Code
85h
Add Inputs
Target
(Program Busy time)
Figure
tBLBH2
10h
Table 6
13, while
Busy
Read Status Register
Device operations
70h
and
Figure 14
Table 6
Table
SR0
ai09858b
7)
and
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