M25P16-VME6TG NUMONYX, M25P16-VME6TG Datasheet - Page 8

IC FLASH 16MBIT 75MHZ 8VDFPN

M25P16-VME6TG

Manufacturer Part Number
M25P16-VME6TG
Description
IC FLASH 16MBIT 75MHZ 8VDFPN
Manufacturer
NUMONYX
Series
Forté™r
Datasheets

Specifications of M25P16-VME6TG

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
16M (2M x 8)
Speed
75MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-VDFPN
Cell Type
NOR
Density
16Mb
Access Time (max)
15ns
Interface Type
Serial (SPI)
Boot Type
Not Required
Address Bus
1b
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
VDFPN EP
Program/erase Volt (typ)
2.7 to 3.6V
Sync/async
Synchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8b
Number Of Words
2M
Supply Current
8mA
Mounting
Surface Mount
Pin Count
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
M25P16-VME6TG
M25P16-VME6TGTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M25P16-VME6TG
Manufacturer:
NUMONYX
Quantity:
8 000
Part Number:
M25P16-VME6TG
Manufacturer:
ST
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2.6
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Signal description
Serial Data output (Q)
This output signal is used to transfer data serially out of the device. Data is shifted out on the
falling edge of Serial Clock (C).
Serial Data input (D)
This input signal is used to transfer data serially into the device. It receives instructions,
addresses, and the data to be programmed. Values are latched on the rising edge of Serial
Clock (C).
Serial Clock (C)
This input signal provides the timing of the serial interface. Instructions, addresses, or data
present at Serial Data input (D) are latched on the rising edge of Serial Clock (C). Data on
Serial Data output (Q) changes after the falling edge of Serial Clock (C).
Chip Select (S)
When this input signal is High, the device is deselected and Serial Data output (Q) is at high
impedance. Unless an internal Program, Erase or Write Status Register cycle is in progress,
the device will be in the Standby mode (this is not the Deep Power-down mode). Driving
Chip Select (S) Low selects the device, placing it in the Active Power mode.
After power-up, a falling edge on Chip Select (S) is required prior to the start of any
instruction.
Hold (HOLD)
The Hold (HOLD) signal is used to pause any serial communications with the device without
deselecting the device.
During the Hold condition, the Serial Data output (Q) is high impedance, and Serial Data
input (D) and Serial Clock (C) are Don’t care.
To start the Hold condition, the device must be selected, with Chip Select (S) driven Low.
Write Protect (W)
The main purpose of this input signal is to freeze the size of the area of memory that is
protected against program or erase instructions (as specified by the values in the BP2, BP1
and BP0 bits of the Status Register).

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