IS42S32200E-7TLI ISSI, Integrated Silicon Solution Inc, IS42S32200E-7TLI Datasheet - Page 8

IC SDRAM 64MBIT 143MHZ 86TSOP

IS42S32200E-7TLI

Manufacturer Part Number
IS42S32200E-7TLI
Description
IC SDRAM 64MBIT 143MHZ 86TSOP
Manufacturer
ISSI, Integrated Silicon Solution Inc
Type
SDRAMr
Datasheets

Specifications of IS42S32200E-7TLI

Format - Memory
RAM
Memory Type
SDRAM
Memory Size
64M (2Mx32)
Speed
143MHz
Interface
Parallel
Voltage - Supply
3.15 V ~ 3.45 V
Operating Temperature
-40°C ~ 85°C
Package / Case
86-TSOPII
Organization
2Mx32
Density
64Mb
Address Bus
13b
Access Time (max)
8/5.5ns
Maximum Clock Rate
143MHz
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
140mA
Pin Count
86
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Data Bus Width
32 bit
Maximum Clock Frequency
143 MHz
Access Time
5.5 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Maximum Operating Current
140 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
706-1082
IS42S32200E-7TLI

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IS42S32200E, IS45S32200E
TRUTH TABLE – COMMANDS AND DQM OPERATION
NOTES:
1. CKE is HIGH for all commands except SELF REFRESH.
2. A0-A10 define the op-code written to the mode register.
3. A0-A10 provide row address, and BA0, BA1 determine which bank is made active.
4. A0-A7 (x32) provide column address; A10 HIGH enables the auto precharge feature (nonpersistent), while A10 LOW disables
5. A10 LOW: BA0, BA1 determine the bank being precharged. A10 HIGH: All banks precharged and BA0, BA1 are “Don’t Care.”
6. AUTO REFRESH if CKE is HIGH, SELF REFRESH if CKE is LOW.
7. Internal refresh counter controls row addressing; all inputs and DQs are “Don’t Care” except for CKE.
8. Activates or deactivates the DQs during WRITEs (zero-clock delay) and READs (two-clock delay).
8
FUNCTION
COMMAND INHIBIT (NOP)
NO OPERATION (NOP)
ACTIVE (Select bank and activate row)
READ (Select bank/column, start READ burst)
WRITE (Select bank/column, start WRITE burst)
BURST TERMINATE
PRECHARGE (Deactivate row in bank or banks)
AUTO REFRESH or SELF REFRESH
(Enter self refresh mode)
LOAD MODE REGISTER
Write Enable/Output Enable
Write Inhibit/Output High-Z
auto precharge; BA0, BA1 determine which bank is being read from or written to.
(2)
(8)
(8)
(6,7)
(3)
(4)
(4)
(5)
CS
H
L
L
L
L
L
L
L
L
RAS
X
H
H
H
H
L
L
L
L
CAS
H
H
H
H
X
L
L
L
L
Integrated Silicon Solution, Inc. — www.issi.com
(1)
WE
X
H
H
H
H
L
L
L
L
DQM
L/H
L/H
H
X
X
X
X
X
X
X
L
(8)
(8)
Bank/Row
Bank/Col
Bank/Col
Op-Code
ADDR
Code
X
X
X
X
High-Z
07/12/2010
Active
Active
Valid
DQs
X
X
X
X
X
X
X
Rev. D

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