ADP1046ADC1-EVALZ Analog Devices, ADP1046ADC1-EVALZ Datasheet - Page 75

• Manufacturer Part Number: ADP1046ADC1-EVALZ
• Description: Power Management IC Development Tools
• Manufacturer: Analog Devices
• Type: Power Switchesr
• Series: ADP1046Ar

Specifications of ADP1046ADC1-EVALZ

• Rohs: yes
• Product: Evaluation Boards
• Tool Is For Evaluation Of: ADP1046A
• Input Voltage: 36 V to 60 V
• Output Voltage: 2.5 V
• Description/function: Daughter card for ADP1046A
• Interface Type: I2C
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• For Use With: ADP1046A

Data Sheet
SOFT START FILTER PROGRAMMING REGISTERS
Table 105. Register 0x71—Soft Start Digital Filter LF Gain Setting
Bits
[7:0]
Table 106. Register 0x72—Soft Start Digital Filter Zero Setting
Bits
[7:0]
Table 107. Register 0x73—Soft Start Digital Filter Pole Setting
Bits
[7:0]
Table 108. Register 0x74—Soft Start Digital Filter HF Gain Setting
Bits
[7:0]
EXTENDED FUNCTIONS REGISTERS
Table 109. Register 0x75—Voltage Line Feedforward
Bits
[7:4]
3
2
[1:0]
Table 110. Register 0x76—Volt-Second Balance Settings (OUTA and OUTB Pins)
Bits
7
6
5
4
3
Bit Name
LF gain setting
Bit Name
Zero setting
Bit Name
Pole location
Bit Name
HF gain setting
Bit Name
Reserved
Disable feedforward
during soft start
Feedforward enable
Gain setting
Bit Name
Modulate enable, t
t
Modulate enable, t
t
Modulate enable, t
1
2
sign
sign
1
2
3
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
This register determines the low frequency gain of the loop response during soft start. The LF
gain is programmable over a 20 dB range (see Figure 58).
Description
This register determines the position of the final zero during soft start (see Figure 58).
Description
This register determines the position of the final pole during soft start (see Figure 58).
Description
This register determines the high frequency gain of the loop response during soft start. The HF
gain is programmable over a 20 dB range (see Figure 58).
Description
Reserved.
If voltage line feedforward is enabled, this bit disables it during the reference ramp-up (soft start).
This operation is gated by the filter GO bit (Register 0x7F[3]).
0 = feedforward enabled during soft start (recommended setting).
1 = feedforward disabled during soft start.
This bit enables the voltage line feedforward loop. This operation is gated by the filter GO bit
(Register 0x7F[3]).
0 = feedforward disabled.
1 = feedforward enabled.
These bits set the gain for the voltage feedforward function.
Bit 1
0
0
1
1
Description
Setting this bit enables modulation from balance control on the OUTA rising edge, t
recommended that volt-second balance not be enabled on edges that are between 0 ns and
640 ns of the switching period.
0 = positive sign. Increase of balance control modulation moves t
1 = negative sign. Increase of balance control modulation moves t
Setting this bit enables modulation from balance control on the OUTA falling edge, t
recommended that volt-second balance not be enabled on edges that are between 0 ns and
640 ns of the switching period.
0 = positive sign. Increase of balance control modulation moves t
1 = negative sign. Increase of balance control modulation moves t
Setting this bit enables modulation from balance control on the OUTB rising edge, t
recommended that volt-second balance not be enabled on edges that are between 0 ns and
640 ns of the switching period.
Bit 0
0
1
0
1
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Gain
1
0.875
0.75
0.5
1
2
1
2
right.
right.
left.
left.
ADP1046A
1
3
. It is
2
. It is
. It is