EVAL-ADM1276EBZ Analog Devices, EVAL-ADM1276EBZ Datasheet
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EVAL-ADM1276EBZ
Manufacturer Part Number
EVAL-ADM1276EBZ
Description
Power Management IC Development Tools EVALUATION BOARD
Manufacturer
Analog Devices
Type
Hot Swap & Power Distributionr
Series
ADM1276r
Datasheet
1.EVAL-ADM1276EBZ.pdf
(48 pages)
Specifications of EVAL-ADM1276EBZ
Rohs
yes
Tool Is For Evaluation Of
ADM1276
Input Voltage
20 V
Factory Pack Quantity
1
Data Sheet
FEATURES
Controls supply voltages from 2 V to 20 V
370 ns response time to short circuit
Resistor-programmable 5 mV to 25 mV current limit
±1% accurate, 12-bit ADC for current, V
Charge pumped gate drive for multiple external N-channel FETs
High gate drive voltage to ensure lowest R
Foldback for tighter FET SOA protection
Automatic retry or latch-off on current fault
Programmable current-limit timer for SOA
Programmable, multifunction GPO
Power-good status output
Analog UV and OV protection
ENABLE pin
Reports power and energy consumption over time
Peak detect registers for current and voltage
PMBus fast mode compliant interface
20-lead LFCSP
APPLICATIONS
Power monitoring and control/power budgeting
Central office equipment
Telecommunication and data communication equipment
PCs/servers
GENERAL DESCRIPTION
The
to be removed from or inserted into a live backplane. It also features
current and voltage readback via an integrated 12-bit analog-to-
digital converter (ADC), accessed using a PMBus™ interface.
The load current is measured using an internal current sense
amplifier that measures the voltage across a sense resistor in
the power path via the SENSE+ and SENSE− pins. A default
limit of 20 mV is set, but this limit can be adjusted, if required,
using a resistor divider network from the internal reference
voltage to the ISET pin.
The
controlling the gate voltage of an external N-channel FET in the
power path, via the GATE pin. The sense voltage—and, therefore,
the load current—is maintained below the preset maximum. The
ADM1276
FET remains on while the current is at its maximum value. This
current-limit time is set by the choice of capacitor connected to
the TIMER pin. In addition, a foldback resistor network can be
used to actively lower the current limit as the voltage across the
FET is increased. This helps to maintain constant power in the
FET and allows the safe operating area (SOA) to be adhered to
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
ADM1276
ADM1276
protects the external FET by limiting the time that the
is a hot swap controller that allows a circuit board
limits the current through the sense resistor by
IN
/V
DSON
OUT
Hot Swap Controller and Digital Power and
Document Feedback
readback
Energy Monitoring with PMBus Interface
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Technical Support
in an effective manner.
In case of a short-circuit event, a fast internal overcurrent
detector responds within 370 ns and signals the gate to shut
down. A 1500 mA pull-down device ensures a fast FET response.
The
protection, programmed using external resistor dividers on the
UV and OV pins. A PWRGD signal can be used to detect when
the output supply is valid, using the FLB pin to monitor the
output. A GPO pin can be configured as an output signal that
can be asserted when a programmed current or voltage level is
reached.
The 12-bit ADC can measure the current in the sense resistor,
as well as the supply voltage on the SENSE+ pin or the output
voltage. A PMBus interface allows a controller to read current
and voltage data from the ADC. Measurements can be initiated
by a PMBus command. Alternatively, the ADC can run conti-
nuously, and the user can read the latest conversion data whenever
required. As many as four unique PMBus addresses can be selected,
depending on the way that the ADR pin is connected.
The
that can be configured for automatic retry or latch-off when an
overcurrent fault occurs.
ADM1276
ADM1276
ENABLE
TIMER
VCAP
FUNCTIONAL BLOCK DIAGRAM
ISET
VCC
UV
OV
SS
is available in a 20-lead LFCSP with a LATCH pin
features overvoltage (OV) and undervoltage (UV)
TIMER ON
1.0V
1.0V
SENSE+
SENSE+
©2011–2013 Analog Devices, Inc. All rights reserved.
SELECT
TIMER
LDO
VOUT
REF
1.0V
IOUT
+
–
–
+
+
TIMEOUT
×50
IOUT
CURRENT
CONTROL
–
GND
LIMIT
SENSE–
+
–
12-BIT
Figure 1.
ADC
DRIVE/
LOGIC
ADM1276-3
GATE
CURRENT
LIMIT
V
CHARGE
CP
PUMP
PMBus
LOGIC
TIMEOUT
AND
ADM1276
PWRGD
GPO2/ALERT2
LATCH
SCL
SDA
ADR
GATE
VOUT
FLB
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