BR93L66RF-WE2 Rohm Semiconductor, BR93L66RF-WE2 Datasheet - Page 15

• Manufacturer Part Number: BR93L66RF-WE2
• Description: IC EEPROM 4KBIT 2MHZ 8SOP
• Manufacturer: Rohm Semiconductor

Specifications of BR93L66RF-WE2

• Memory Size: 4K (256 x 16)
• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Speed: 2MHz
• Interface: Microwire, 3-Wire Serial
• Voltage - Supply: 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOP
• Clock Frequency: 2MHz
• Supply Voltage Range: 1.8V To 5.5V
• Memory Case Style: SOP
• No. Of Pins: 8
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (18-Jun-2010)
• Package /: RoHS Compliant
• Memory Configuration: 256 X 16
• Interface Type: Serial, Microwire
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Cautions on use
7) Notes on power ON/OFF
8) Noise countermeasures
(1) Described numeric values and data are design representative values, and the values are not guaranteed.
(2) We believe that application circuit examples are recommendable, however, in actual use, confirm characteristics further sufficiently. In
(3) Absolute Maximum Ratings
(4) GND electric potential
(5) Heat design
(6) Terminal to terminal shortcircuit and wrong packaging
(7) Use in a strong electromagnetic field may cause malfunction, therefore, evaluate design sufficiently.
(Bad example) CS pin is pulled up to Vcc.
the case of use by changing the fixed number of external parts, make your decision with sufficient margin in consideration of static
characteristics and transition characteristics and fluctuations of external parts and our LSI.
If the absolute maximum ratings such as impressed voltage and action temperature range and so forth are exceeded, LSI may be
destructed. Do not impress voltage and temperature exceeding the absolute maximum ratings. In the case of fear exceeding the absolute
maximum ratings, take physical safety countermeasures such as fuses, and see to it that conditions exceeding the absolute maximum
ratings should not be impressed to LSI.
Set the voltage of GND terminal lowest at any action condition. Make sure that each terminal voltage is not lower than that of GND
terminal in consideration of transition status.
In consideration of allowable loss in actual use condition, carry out heat design with sufficient margin.
When to package LSI onto a board, pay sufficient attention to LSI direction and displacement. Wrong packaging may destruct LSI. And in
the case of shortcircuit between LSI terminals and terminals and power source, terminal and GND owing to foreign matter, LSI may be
destructed.
At power ON/OFF, set CS "L".
When CS is "H", this IC gets in input accept status (active). If power is turned on in this status, noises and the likes may cause
malfunction, mistake write or so. To prevent these, at power ON, set CS "L". (When CS is in "L" status, all inputs are cancelled.) And at
power decline, owing to power line capacity and so forth, low power status may continue long. At this case too, owing to the same
reason, malfunction, mistake write may occur, therefore, at power OFF too, set CS "L".
In this case, CS becomes "H" (active status), and EEPROM may have malfunction,
mistake write owing to noises and the likes.
Even when CS input is High-Z, the status becomes like this case, which please note.
POR circuit
This IC has a POR (Power On Reset) circuit as mistake write countermeasure.
After POR action, it gets in write disable status. The POR circuit is valid only when power is ON, and does not work when power is OFF.
However, if CS is "H" at power ON/OFF, it may become write enable status owing to noises and the likes.
For secure actions, observe the following conditions.
LVCC circuit
LVCC (Vcc - Lockout) circuit prevents data rewrite action at low power, and prevents wrong write.
At LVCC voltage (Typ. = 1.2V) or below, it prevent data rewrite.
Vcc noise (bypass capacitor)
When noise or surge gets in the power source line, malfunction may occur, therefore, for removing these, it is recommended to attach
a by pass capacitor (0.1
And, it is also recommended to attach a bypass capacitor between board Vcc and GND.
SK noise
When the rise time (tR) of SK is long, and a certain degree or more of noise exists, malfunction may occur owing to clock bit
displacement. To avoid this, a Schmitt trigger circuit is built in SK input. the hysteresis width of this circuit is set about 0.2V, if noises
exist at SK input, set the noise amplitude 0.2Vp-p or below.
And it is recommended to set the rise time (tR) of SK 100ns or below. In the case when the rise time is 100ns or higher, take sufficient
noise countermeasures. Make the clock rise, fall time as small as possible.
1 Set CS = "L".
2 Turn on power so as to satisfy the recommended conditions of tR, tOFF, Vbot for POR circuit action.
V
0
CC
µ
F) between IC Vcc and GND, At that moment, attach it as close to IC as possible.
V
CS
t
CC
OFF
Fig. 62 Rise waveform diagram
V
GND
V
GND
CC
CC
t
R
Fig. 61 Timing at power ON/OFF
Bad example
Vbot
15/16
Recommended conditions of t
100ms or below
10ms or below
Good example
t
R
(Good example) It is "L" at power ON/OFF.
10ms or higher
10ms or higher
Set 10ms or higher to recharge at power OFF.
When power is turned on without observing this condition, IC
internal circuit may not be reset, which please note.
t
OFF
R
, t
0.3V or below
0.2V or below
OFF
, Vbot
Vbot