ATSAM4S-EK2 Atmel, ATSAM4S-EK2 Datasheet - Page 14

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ATSAM4S-EK2

Manufacturer Part Number
ATSAM4S-EK2
Description
Development Boards & Kits - ARM EVAL KIT SAM4S8 & SAM4S16
Manufacturer
Atmel
Datasheet

Specifications of ATSAM4S-EK2

Rohs
yes
Product
Evaluation Kits
Tool Is For Evaluation Of
SAM4SD32C
Core
ARM Cortex M4
Interface Type
RS-232, USB
Operating Supply Voltage
5 V
4.3.8.1
4.3.8.2
SAM4S-EK2 User Guide
LCD Module
Backlight Control
The LCD module gets reset from the NRST signal. As explained, this NRST is shared with the JTAG port
and the push-button BP1. The LCD chip select signal is connected to NCS1; the jumper JP13 can dis-
connect it so that this PIO line is available for other custom usage.
The SAM4SD32 communicates with the LCD through PIOC where an 8-bit parallel “8080-like” protocol
data bus has to be implemented in software.
Figure 4-8.
The LCD backlight is made of four integrated white chip-LEDs arranged in parallel. These are driven by
an AAT3155 charge pump, MN8. The AAT3155 is controlled by the SAM4SD32 through a single PIO
line PC13 interface; the 0 Ohm resistor R68 is mounted in series on this line, which permits to use it for
other custom purposes. In that case, the pull-up resistor R64 maintains the charge pump permanently
enabled by default.
On the anode drive line, a 0 Ohm resistor R59 is implemented in series for an optional current limitation.
Figure 4-9.
NRST
LCD_DB0
LCD_DB4
LCD_DB2
LCD_DB3
LCD_DB1
LCD_DB8
LCD_DB6
LCD_DB7
LCD_DB5
LCD_DB9
LCD Block
Backlight Control
PC[0..31]
R6 1
R6 3
1
2
3
4
1
2
3
4
+3 V3
DG ND
10 K
R5 6
R5 8
4.7 K
4.7 K
DNP
4.7 K
DNP
PC13
PC22
PC23
PC24
PC25
PC26
PC27
PC28
PC29
PC30
PC31
8
7
6
5
8
7
6
5
RA 2
4.7 Kx4
DNP
RA 3
4.7 Kx4
DNP
NRST
+3 V3
PC13
DG ND
PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC0
PC11
PC8
PC19
PC15
+
FB 1
BN03K 31 4S3 00R
C4 3
10 uF
LE D_A
+3 V3
DG ND
R6 8
0R
JP 13
C4 4
10 0nF
R5 9
X_ RIG HT
Y_ UP
X_ LEFT
Y_ DO WN
+3 V3
LCD_DB17
LCD_DB16
LCD_DB15
LCD_DB14
LCD_DB13
LCD_DB12
LCD_DB11
LCD_DB10
LCD_DB9
LCD_DB8
LCD_DB7
LCD_DB6
LCD_DB5
LCD_DB4
LCD_DB3
LCD_DB2
LCD_DB1
LCD_DB0
He ade r2
R6 4
47 K
C4 5
10 0nF
0R
1
LE D_K 1
LE D_K 2
LE D_K 3
LE D_K 4
Y_ UP
Y_ DO WN
X_ RIG HT
X_ LEFT
DG ND
5
2
DG ND
C5 4
1u F
C5 7
4.7 uF
R4 9
47 K
4
3
DG ND
NOT POPULATED
10
11
9
5
4
The part is placed as
close as possible to J8
DNP
D1
PA CDN04 4Y5 R
TV S, S OT23-5
MN8
AA T31 55ITP- T1
LCD B AC KLIG HT
C1 +
C1 -
EN/SE T
IN
GND
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
1
2
3
4
5
6
7
8
9
J8
FH26- 39S -0.3 SHW
LCD
VDD
DB 17
DB 16
DB 15
DB 14
DB 13
DB 12
DB 11
DB 10
DB 9
DB 8
DB 7
DB 6
DB 5
DB 4
DB 3
DB 2
DB 1
DB 0
VDD
RD
WR
RS
CS
RE SE T
IM0
IM1
GND
LE D-A
LE DK 1
LE DK 2
LE DK 3
LE DK 4
Y+
Y-
X+
X-
NC
GND
OUTCP
C2 +
C2 -
D1
D2
D3
D4
7
6
8
3
2
1
12
DG ND
PIN 39
PIN 1
LE D_A
LE D_K 1
LE D_K 2
LE D_K 3
LE D_K 4
PINs
on
BOT
Six slots on PCB for LCD shield
C5 5
1u F
DG ND
DG ND
TP 7
DG ND
C5 6
1u F
Evaluation Kit Hardware
FTM28 0C34D
DG ND
11176A–ATARM–24-Sep-12
DG ND
Z7
DG ND
4-7

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