ATSAM4S-EK2 Atmel, ATSAM4S-EK2 Datasheet - Page 12

• Manufacturer Part Number: ATSAM4S-EK2
• Description: Development Boards & Kits - ARM EVAL KIT SAM4S8 & SAM4S16
• Manufacturer: Atmel

Specifications of ATSAM4S-EK2

• Rohs: yes
• Product: Evaluation Kits
• Tool Is For Evaluation Of: SAM4SD32C
• Core: ARM Cortex M4
• Interface Type: RS-232, USB
• Operating Supply Voltage: 5 V

4.3.6
4.3.7
SAM4S-EK2 User Guide
UART
USART
The Universal Asynchronous Receiver Transmitter features a two-pin UART that can be used for com-
munication and trace purposes. It offers an ideal channel for in-situ programming solutions. This UART
is associated with two PDC channels to reduce the processor time on packet handling.
This two-pin UART (TXD and RXD only) is buffered through an RS232 Transceiver MN6 and brought to
the DB9 male connector J7.
Figure 4-5.
The Universal Synchronous/Asynchronous Receiver Transmitter (USART) provides one full duplex uni-
versal synchronous/asynchronous serial link. The data frame format is extensively configurable (data
length, parity, number of stop bits) to support a broad range of serial communication standards. The
USART is also associated with PDC channels for TX/RX data access.
To avoid any electrical conflict, the RS485 transceiver is isolated from the receiving line PA21.
Should you need to implement an RS485 channel in place of the RS232, follow the procedure below:
1. make sure your software will permanently set PA23 to a high level - this will permanently disable the
2. change JP31 to make sure that 2-3 pins are connected.
VDDIO pins:
Power for the Peripherals I/O lines.
The voltage ranges from 1.62V to 3.6V.
VDDOUT pin:
Output of the internal voltage regulator.
VDDCORE pins:
Power for the core, including the processor, embedded memories and peripherals.
The voltage ranges from 1.62V to 1.95V.
VDDPLL pin:
Power for the PLL A, PLL B and 12 MHz oscillator.
The voltage ranges from 1.62V to 1.95V.
Note:
Note:
RS232 receiver.
VDDPLL should be decoupled and filtered from VDDCORE.
For design optimization purposes, both transmitters have been implemented on the same
PIO lines, that is PA21, 22, 23, 24, 25.
PA10
PA9
UART
+3V3
TP5
TP5
SMD
SMD
R45
R45
100K
100K
+3V3
R47
R47
R48
R48
R46
R46
100K
100K
+3V3
C40
C40
100nF
100nF
0R
0R
0R
0R
TP6
TP6
SMD
SMD
DGND
100nF
100nF
C39
C39
C41
C41
100nF
100nF
16
15
11
12
10
2
6
9
MN6
MN6
MAX3232CSE
MAX3232CSE
VCC
V+
V-
GND
T1IN
R1OUT
T2IN
R2OUT
T1OUT
T2OUT
R1IN
R2IN
C1+
C2+
C1-
C2-
1
3
4
5
14
13
7
8
C38
C38
100nF
100nF
C42
C42
100nF
100nF
Evaluation Kit Hardware
DGND
1
6
2
7
3
8
4
9
5
FGND
11176A–ATARM–24-Sep-12
J7
J7
4-5