AT25DF321A-SH-T Atmel, AT25DF321A-SH-T Datasheet - Page 15

IC FLASH 32MBIT 100MHZ 8SOIC

AT25DF321A-SH-T

Manufacturer Part Number
AT25DF321A-SH-T
Description
IC FLASH 32MBIT 100MHZ 8SOIC
Manufacturer
Atmel
Datasheet

Specifications of AT25DF321A-SH-T

Format - Memory
FLASH
Memory Type
DataFLASH
Memory Size
32M (16384 pages x 256 Bytes)
Speed
100MHz
Interface
SPI, RapidS
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
Density
32Mb
Access Time (max)
5ns
Interface Type
Serial (SPI)
Address Bus
1b
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
SOIC
Program/erase Volt (typ)
2.7 to 3.6V
Sync/async
Synchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8b
Number Of Words
4M
Supply Current
19mA
Mounting
Surface Mount
Pin Count
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Price
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Atmel AT25DF321A
8.5
Program/Erase Suspend
In some code plus data storage applications, it is often necessary to process certain high-level system interrupts that
require relatively immediate reading of code or data from the Flash memory. In such an instance, it may not be possible for
the system to wait the microseconds or milliseconds required for the Flash memory to complete a program or erase cycle.
The Program/Erase Suspend command allows a program or erase operation in progress to a particular 64-Kbyte sector of
the Flash memory array to be suspended so that other device operations can be performed. For example, by suspending
an erase operation to a particular sector, the system can perform functions such as a program or read operation within
another 64-Kbyte sector in the device. Other device operations, such as a Read Status Register, can also be performed
while a program or erase operation is suspended.
outlines the operations that are allowed and not allowed during
Table 8-1
a program or erase suspend.
Since the need to suspend a program or erase operation is immediate, the Write Enable command does not need to be
issued prior to the Program/Erase Suspend command being issued. Therefore, the Program/Erase Suspend command
operates independently of the state of the WEL bit in the Status Register.
To perform a Program/Erase Suspend, the CS pin must first be asserted and the opcode of B0h must be clocked into the
device. No address bytes need to be clocked into the device, and any data clocked in after the opcode will be ignored.
When the CS pin is deasserted, the program or erase operation currently in progress will be suspended within a time of
t
. The Program Suspend (PS) bit or the Erase Suspend (ES) bit in the Status Register will then be set to the logical
SUSP
“1” state to indicate that the program or erase operation has been suspended. In addition, the RDY/BSY bit in the Status
Register will indicate that the device is ready for another operation. The complete opcode must be clocked into the device
before the CS pin is deasserted, and the CS pin must be deasserted on an even byte boundary (multiples of eight bits);
otherwise, no suspend operation will be performed.
Read operations are not allowed to a 64-Kbyte sector that has had its program or erase operation suspended. If a read is
attempted to a suspended sector, then the device will output undefined data. Therefore, when performing a Read Array
operation to an unsuspended sector and the device’s internal address counter increments and crosses the sector boundary
to a suspended sector, the device will then start outputting undefined data continuously until the address counter
increments and crosses a sector boundary to an unsuspended sector.
A program operation is not allowed to a sector that has been erase suspended. If a program operation is attempted to an
erase suspended sector, then the program operation will abort and the WEL bit in the Status Register will be reset back to
the logical “0” state. Likewise, an erase operation is not allowed to a sector that has been program suspended. If
attempted, the erase operation will abort and the WEL bit in the Status Register will be reset to a logical “0” state.
During an Erase Suspend, a program operation to a different 64-Kbyte sector can be started and subsequently suspended.
This results in a simultaneous Erase Suspend/Program Suspend condition and will be indicated by the states of both the ES
and PS bits in the Status Register being set to the logical “1” state.
If a Reset operation (see
) is performed while a sector is erase suspended, the suspend operation will
“Reset” on page 36
abort and the contents of the block in the suspended sector will be left in an undefined state. However, if a Reset is
performed while a sector is program suspended, the suspend operation will abort but only the contents of the page that
was being programmed and subsequently suspended will be undefined. The remaining pages in the 64-Kbyte sector will
retain their previous contents.
If an attempt is made to perform an operation that is not allowed during a program or erase suspend, such as a Protect
Sector operation, then the device will simply ignore the opcode and no operation will be performed. The state of the WEL
bit in the Status Register, as well as the SPRL (Sector Protection Registers Locked) and SLE (Sector Lockdown Enabled)
bits, will not be affected.
15
3686D–DFLASH–12/09

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