AT25DF161-SH-B Atmel, AT25DF161-SH-B Datasheet - Page 37

IC FLASH 16MBIT 100MHZ 8SOIC

AT25DF161-SH-B

Manufacturer Part Number
AT25DF161-SH-B
Description
IC FLASH 16MBIT 100MHZ 8SOIC
Manufacturer
Atmel
Datasheet

Specifications of AT25DF161-SH-B

Format - Memory
FLASH
Memory Type
DataFLASH
Memory Size
16M (2M x 8)
Speed
100MHz
Interface
SPI, RapidS
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
Density
16Mb
Access Time (max)
5ns
Interface Type
Serial (SPI)
Boot Type
Not Required
Address Bus
1b
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
SOIC EIAJ
Program/erase Volt (typ)
2.7 to 3.6V
Sync/async
Synchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8b
Number Of Words
2M
Supply Current
19mA
Mounting
Surface Mount
Pin Count
8
Mounting Style
SMD/SMT
Memory Configuration
8192 Pages X 256 Bytes
Clock Frequency
100MHz
Supply Voltage Range
2.7V To 3.6V
Memory Case Style
SOIC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
3687E–DFLASH–11/10
12.3
Table 12-2.
Figure 12-2. Read Manufacturer and Device ID
Note: Each transition
Deep Power-Down
During normal operation, the device will be placed in the standby mode to consume less power as long as the CS pin
remains deasserted and no internal operation is in progress. The Deep Power-Down command offers the ability to place
the device into an even lower power consumption state called the Deep Power-Down mode.
When the device is in the Deep Power-Down mode, all commands including the Read Status Register command will be
ignored with the exception of the Resume from Deep Power-Down command. Since all commands will be ignored, the
mode can be used as an extra protection mechanism against program and erase operations.
Entering the Deep Power-Down mode is accomplished by simply asserting the CS pin, clocking in the opcode of B9h, and
then deasserting the CS pin. Any additional data clocked into the device after the opcode will be ignored. When the CS pin
is deasserted, the device will enter the Deep Power-Down mode within the maximum time of t
The complete opcode must be clocked in before the CS pin is deasserted, and the CS pin must be deasserted on an even
byte boundary (multiples of eight bits); otherwise, the device will abort the operation and return to the standby mode
once the CS pin is deasserted. In addition, the device will default to the standby mode after a power-cycle.
Data Type
Manufacturer ID
Device ID (Part 1)
Device ID (Part 2)
SCK
SO
CS
SI
Manufacturer and Device ID Details
Bit 7
0
0
0
Family Code
Sub Code
Bit 6
0
1
0
shown for SI and SO represents one byte (8 bits)
Bit 5
0
0
0
JEDEC Assigned Code
Bit 4
1
0
0
Bit 3
Product Version Code
1
0
0
Density Code
Bit 2
1
1
0
Bit 1
1
1
1
Bit 0
1
0
0
Value
Hex
46h
02h
1Fh
Details
JEDEC Code:
Family Code:
Density Code: 00110 (16-Mbit)
Sub Code:
Product Version:00010 (Second major version)
0001 1111 (1Fh for Atmel)
010 (AT25DF/26DFxxx series)
000 (Standard series)
Atmel AT25DF161
EDPD
.
37

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