AT45DB021D-SH-T Atmel, AT45DB021D-SH-T Datasheet - Page 19

IC FLASH 2MBIT 66MHZ 8SOIC

AT45DB021D-SH-T

Manufacturer Part Number
AT45DB021D-SH-T
Description
IC FLASH 2MBIT 66MHZ 8SOIC
Manufacturer
Atmel
Datasheets

Specifications of AT45DB021D-SH-T

Format - Memory
FLASH
Memory Type
DataFLASH
Memory Size
2M (1024 pages x 264 bytes)
Speed
66MHz
Interface
SPI, RapidS
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
Cell Type
NOR
Density
2Mb
Access Time (max)
6ns
Interface Type
Serial (SPI)
Boot Type
Not Required
Address Bus
1b
Operating Supply Voltage (typ)
3/3.3V
Operating Temp Range
-40C to 85C
Package Type
SOIC EIAJ
Program/erase Volt (typ)
2.7 to 3.6V
Sync/async
Synchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8b
Number Of Words
256K
Supply Current
15mA
Mounting
Surface Mount
Pin Count
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT45DB021D-SH-T
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Atmel AT45DB021D
Main Memory Page Program with Built-in Erase. A page of data is first transferred from the main memory to the
buffer and then the same data (from the buffer) is programmed back into its original page of main memory. To start
®
®
the rewrite operation for the Atmel
DataFlash
standard page size (264-bytes), a 1-byte opcode, 58H, must be
clocked into the device, followed by three address bytes comprised of five don’t care bits, 10 page address bits
(PA9-PA0) that specify the page in main memory to be rewritten and nine don’t care bits. To initiate an auto page
rewrite for a binary page size (256-bytes), the opcode 58H must be clocked into the device followed by three
address bytes consisting of six don’t care bits, 10 page address bits (A17 - A8) that specify the page in the main
memory that is to be written and eight don’t care bits. When a low-to-high transition occurs on the CS pin, the part
will first transfer data from the page in main memory to a buffer and then program the data from the buffer back into
same page of main memory. The operation is internally self-timed and should take place in a maximum time of t
.
EP
During this time, the status register indicate that the part is busy.
If a sector is programmed or reprogrammed sequentially page by page, then the programming algorithm shown in
Figure 20-1 (page
41) is recommended. Otherwise, if multiple bytes in a page or several pages are programmed
randomly in a sector, then the programming algorithm shown in
Figure 20-2 (page
42) is recommended. Each
page within a sector must be updated/rewritten at least once within every 20,000 cumulative page erase/program
operations in that sector. Please contact Atmel for availability of devices that are specified to exceed the 20K cycle
cumulative limit.
9.4
Status Register Read
The status register can be used to determine the device’s ready/busy status, page size, a Main Memory Page to
Buffer Compare operation result, the Sector Protection status or the device density. The Status Register can be
read at any time, including during an internally self-timed program or erase operation. To read the status register,
the CS pin must be asserted and the opcode of D7H must be loaded into the device. After the opcode is clocked in,
the 1-byte status register will be clocked out on the output pin (SO), starting with the next clock cycle. The data in
the status register, starting with the MSB (bit seven), will be clocked out on the SO pin during the next eight clock
cycles. After the one byte of the status register has been clocked out, the sequence will repeat itself (as long as CS
remains low and SCK is being toggled). The data in the status register is constantly updated, so each repeating
sequence will output new data.
Ready/busy status is indicated using bit seven of the status register. If bit seven is a one, then the device is not
busy and is ready to accept the next command. If bit seven is a zero, then the device is in a busy state. Since the
data in the status register is constantly updated, the user must toggle SCK pin to check the ready/busy status.
There are several operations that can cause the device to be in a busy state: Main Memory Page to Buffer
Transfer, Main Memory Page to Buffer Compare, Buffer to Main Memory Page Program, Main Memory Page
Program through Buffer, Page Erase, Block Erase, Sector Erase, Chip Erase and Auto Page Rewrite.
The result of the most recent Main Memory Page to Buffer Compare operation is indicated using bit six of the
status register. If bit six is a zero, then the data in the main memory page matches the data in the buffer. If bit six is
a one, then at least one bit of the data in the main memory page does not match the data in the buffer.
Bit one in the Status Register is used to provide information to the user whether or not the sector protection has
been enabled or disabled, either by software-controlled method or hardware-controlled method. A logic 1 indicates
that sector protection has been enabled and logic 0 indicates that sector protection has been disabled.
Bit zero in the Status Register indicates whether the page size of the main memory array is configured for “power
of 2” binary page size (256-bytes) or the DataFlash standard page size (264-bytes). If bit zero is a one, then the
page size is set to 256-bytes. If bit zero is a zero, then the page size is set to 264-bytes.
The device density is indicated using bits five, four, three, and two of the status register. For Atmel AT45DB021D,
the four bits are 0101 The decimal value of these four binary bits does not equate to the device density; the four
bits represent a combinational code relating to differing densities of DataFlash devices. The device density is not
the same as the density code indicated in the JEDEC device ID information. The device density is provided only for
backward compatibility.
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3638J–DFLASH–5/10

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