AT45DB021D-SH-T Atmel, AT45DB021D-SH-T Datasheet - Page 8

IC FLASH 2MBIT 66MHZ 8SOIC

AT45DB021D-SH-T

Manufacturer Part Number
AT45DB021D-SH-T
Description
IC FLASH 2MBIT 66MHZ 8SOIC
Manufacturer
Atmel
Datasheets

Specifications of AT45DB021D-SH-T

Format - Memory
FLASH
Memory Type
DataFLASH
Memory Size
2M (1024 pages x 264 bytes)
Speed
66MHz
Interface
SPI, RapidS
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
Cell Type
NOR
Density
2Mb
Access Time (max)
6ns
Interface Type
Serial (SPI)
Boot Type
Not Required
Address Bus
1b
Operating Supply Voltage (typ)
3/3.3V
Operating Temp Range
-40C to 85C
Package Type
SOIC EIAJ
Program/erase Volt (typ)
2.7 to 3.6V
Sync/async
Synchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8b
Number Of Words
256K
Supply Current
15mA
Mounting
Surface Mount
Pin Count
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT45DB021D-SH-T
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
7.3
7.4
7.5
8
Buffer to Main Memory Page Program without Built-in Erase
Page Erase
Block Erase
AT45DB021D
the part will first erase the selected page in main memory (the erased state is a logic 1) and then
program the data stored in the buffer into the specified page in main memory. Both the erase
and the programming of the page are internally self-timed and should take place in a maximum
time of t
A previously-erased page within main memory can be programmed with the contents of the buf-
fer. A 1-byte opcode, 88H, must be clocked into the device. For the DataFlash standard page
size (264 bytes), the opcode must be followed by three address bytes consist of 5 don’t care
bits, 10 page address bits (PA9 - PA0) that specify the page in the main memory to be written
and 9 don’t care bits. To perform a buffer to main memory page program without built-in erase
for the binary page size (256 bytes), the opcode 88H must be clocked into the device followed
by three address bytes consisting of 6 don’t care bits, 10 page address bits (A17 - A8) that spec-
ify the page in the main memory to be written and 8 don’t care bits. When a low-to-high transition
occurs on the CS pin, the part will program the data stored in the buffer into the specified page in
the main memory. It is necessary that the page in main memory that is being programmed has
been previously erased using one of the erase commands (Page Erase or Block Erase). The
programming of the page is internally self-timed and should take place in a maximum time of t
During this time, the status register will indicate that the part is busy.
The Page Erase command can be used to individually erase any page in the main memory array
allowing the Buffer to Main Memory Page Program to be utilized at a later time. To perform a
page erase in the DataFlash standard page size (264 bytes), an opcode of 81H must be loaded
into the device, followed by three address bytes comprised of 5 don’t care bits, 10 page address
bits (PA9 - PA0) that specify the page in the main memory to be erased and 9 don’t care bits. To
perform a page erase in the binary page size (256 bytes), the opcode 81H must be loaded into
the device, followed by three address bytes consist of 6 don’t care bits, 10 page address bits
(A17 - A8) that specify the page in the main memory to be erased and 8 don’t care bits. When a
low-to-high transition occurs on the CS pin, the part will erase the selected page (the erased
state is a logical 1). The erase operation is internally self-timed and should take place in a maxi-
mum time of t
A block of eight pages can be erased at one time. This command is useful when large amounts
of data has to be written into the device. This will avoid using multiple Page Erase Commands.
To perform a block erase for the DataFlash standard page size (264 bytes), an opcode of 50H
must be loaded into the device, followed by three address bytes comprised of 5 don’t care bits,
7 page address bits (PA9 -PA3) and 12 don’t care bits. The 7 page address bits are used to
specify which block of eight pages is to be erased. To perform a block erase for the binary page
size (256 bytes), the opcode 50H must be loaded into the device, followed by three address
bytes consisting of 6 don’t care bits, 7 page address bits (A17 - A11) and 11 don’t care bits. The
9 page address bits are used to specify which block of eight pages is to be erased. When a low-
to-high transition occurs on the CS pin, the part will erase the selected block of eight pages. The
erase operation is internally self-timed and should take place in a maximum time of t
this time, the status register will indicate that the part is busy.
EP
. During this time, the status register will indicate that the part is busy.
PE
. During this time, the status register will indicate that the part is busy.
3638I–DFLASH–04/09
BE
. During
P
.

Related parts for AT45DB021D-SH-T