AT45DB021D-SH-T Atmel, AT45DB021D-SH-T Datasheet - Page 9

• Manufacturer Part Number: AT45DB021D-SH-T
• Description: IC FLASH 2MBIT 66MHZ 8SOIC
• Manufacturer: Atmel

Specifications of AT45DB021D-SH-T

• Format - Memory: FLASH
• Memory Type: DataFLASH
• Memory Size: 2M (1024 pages x 264 bytes)
• Speed: 66MHz
• Interface: SPI, RapidS
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• Cell Type: NOR
• Density: 2Mb
• Access Time (max): 6ns
• Interface Type: Serial (SPI)
• Boot Type: Not Required
• Address Bus: 1b
• Operating Supply Voltage (typ): 3/3.3V
• Operating Temp Range: -40C to 85C
• Package Type: SOIC EIAJ
• Program/erase Volt (typ): 2.7 to 3.6V
• Sync/async: Synchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8b
• Number Of Words: 256K
• Supply Current: 15mA
• Mounting: Surface Mount
• Pin Count: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 7-1.
7.6
3638I–DFLASH–04/09
PA9/
A17
0
0
0
0
1
1
1
1
•
•
•
Sector Erase
PA8/
A16
Block Erase Addressing
0
0
0
0
1
1
1
1
•
•
•
PA7/
A15
0
0
0
0
1
1
1
1
•
•
•
The Sector Erase command can be used to individually erase any sector in the main memory.
There are 4 sectors and only one sector can be erased at one time. To perform sector 0a or sec-
tor 0b erase for the DataFlash standard page size (264 bytes), an opcode of 7CH must be
loaded into the device, followed by three address bytes comprised of 5 don’t care bits, 7 page
address bits (PA9 - PA3) and 12 don’t care bits. To perform a sector 1-7 erase, the opcode 7CH
must be loaded into the device, followed by three address bytes comprised of 5 don’t care bits, 3
page address bits (PA9 - PA7) and 16 don’t care bits. To perform sector 0a or sector 0b erase
for the binary page size (256 bytes), an opcode of 7CH must be loaded into the device, followed
by three address bytes comprised of 6 don’t care bits and 7 page address bits (A17 - A11) and
11 don’t care bits. To perform a sector 1-7 erase, the opcode 7CH must be loaded into the
device, followed by three address bytes comprised of 6 don’t care bit and 3 page address bits
(A17 - A15) and 16 don’t care bits. The page address bits are used to specify any valid address
location within the sector which is to be erased. When a low-to-high transition occurs on the CS
pin, the part will erase the selected sector. The erase operation is internally self-timed and
should take place in a maximum time of t
the part is busy.
PA6/
A14
0
0
0
0
1
1
1
1
•
•
•
PA5/
A13
0
0
0
0
1
1
1
1
•
•
•
PA4/
A12
0
0
1
1
0
0
1
1
•
•
•
PA3/
A11
0
1
0
1
0
1
0
1
•
•
•
SE
. During this time, the status register will indicate that
PA2/
A10
X
X
X
X
X
X
X
X
•
•
•
PA1/
A9
X
X
X
X
X
X
X
X
•
•
•
PA0/
A8
X
X
X
X
X
X
X
X
•
•
•
Block
124
125
126
127
0
1
2
3
•
•
•
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