VRS51C1100-40-Q Cypress Semiconductor, VRS51C1100-40-Q Datasheet - Page 17

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VRS51C1100-40-Q

Manufacturer Part Number
VRS51C1100-40-Q
Description
8-bit Microcontrollers - MCU 128K+1K 40MHz 5V
Manufacturer
Cypress Semiconductor
Datasheet

Specifications of VRS51C1100-40-Q

Product Category
8-bit Microcontrollers - MCU
Core
8051
Data Bus Width
8 bit
Maximum Clock Frequency
40 MHz
Program Memory Size
64 KB
Data Ram Size
1 KB
Operating Supply Voltage
4.5 V to 5.5 V
Package / Case
QFP-44
Mounting Style
SMD/SMT
Data Rom Size
128 B
Interface Type
UART
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
36
Number Of Timers
3
Program Memory Type
Flash
Factory Pack Quantity
96
Supply Voltage - Max
5.5 V
Supply Voltage - Min
4.5 V
Port 4
Port 4 has four related I/O pins and its port address is
located at 0D8H.
T
Software Port Control
Some instructions allow the user to read the logic state
of the output pin, while others allow the user to read
the contents of the associated port register. These
instructions are called read-modify-write instructions. A
list of these instructions are found in the following
table.
Upon execution of these instructions, the content of the
port register (at least 1 bit) is modified. The other read
instructions take the present state of the inputs into
account. For example, instruction ANL P3,#01h
obtains the value in the P3 register; performs the
desired logic operation with the constant 01h; and
recopies the result into the P3 register. When users
want to take the present state of the inputs into
account, they must first read these states and perform
an AND operation between the read value and the
constant.
When the port is used as an output, the register
contains information on the state of the output pins.
Measuring the state of an output directly on the pin is
inaccurate because the electrical level depends mostly
on the type of charge that is applied to it. The functions
shown next take the value of the register rather than
that of the pin.
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ABLE
Bit
7
6
5
4
3
2
1
0
MOV A, P3; State of the inputs in the accumulator
ANL A, #01; AND operation between P3 and 01h
VRS51C1100
7
22: P
ORT
Mnemonic
Unused
Unused
Unused
Unused
P4.3
P4.2
P4.1
P4.0
6
4 (P4) - SFR D8
Unused
5
Description
-
-
-
-
Used to output the setting to pins P4.3,
P4.2, P4.1, P4.0 respectively.
H
4
P4.3
3
P4.2
2
P4.1
1
P4.0
0
T
V
Port Operation Timing
Writing to a Port (Output)
When an operation results in a modification of the
content in a port register, the new value is placed at
the output of the D flip-flop during the last machine
cycle that the instruction needed to execute.
Reading a Port (Input)
To be sampled, the signal duration present on the I/O
inputs must be longer than Fosc/12.
ABLE
ALUES
Instruction
ANL
ORL
XRL
JBC
CPL
INC
DEC
DJNZ
MOV P.,C
CLR P.x
SETB P.x
23: L
IST OF
I
NSTRUCTIONS THAT
Function
Logical AND ex: ANL P0, A
Logical OR ex: ORL P2, #01110000B
Exclusive OR ex: XRL P1, A
Jump if the bit of the port is set to 0
Complement one bit of the port
Increment the port register by 1
Decrement the port register by 1
Decrement by 1 and jump if the result is not
equal to 0
Copy the held bit C to the port
Set the port bit to 0
Set the port bit to 1
R
EAD AND
M
ODIFY THE
P
ORT
page 17 of 50
U
SING
R
EGISTER

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