VRS51C1100-40-Q Cypress Semiconductor, VRS51C1100-40-Q Datasheet - Page 11

• Manufacturer Part Number: VRS51C1100-40-Q
• Description: 8-bit Microcontrollers - MCU 128K+1K 40MHz 5V
• Manufacturer: Cypress Semiconductor

Specifications of VRS51C1100-40-Q

• Product Category: 8-bit Microcontrollers - MCU
• Core: 8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 40 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 1 KB
• Operating Supply Voltage: 4.5 V to 5.5 V
• Package / Case: QFP-44
• Mounting Style: SMD/SMT
• Data Rom Size: 128 B
• Interface Type: UART
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 36
• Number Of Timers: 3
• Program Memory Type: Flash
• Factory Pack Quantity: 96
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 4.5 V

Data Pointer
The VRS51C1100 has one 16-bit data pointer. The
DPTR is accessed via two SFR addresses: DPL
located at address 82h and DPH located at address
83h.
Stack Pointer
The stack pointer (SP) is a register located at address
81h of the SFR register area whose value corresponds
to the address of the last item that was put on the
processor stack. Each time new data is put on the SP,
the value of the stack pointer is incremented.
By default, the stack pointer value is 07h, but it is
possible to program the processor stack pointer to
point anywhere in the 00h to FFh range of RAM
memory. When a function call is performed or an
interrupt is serviced, the 16-bit return address (2 bytes)
is stored on the stack. Data can be placed manually on
the stack by using the PUSH and POP functions.
Data Memory
The VRS51C1100 has 1KB of on-chip RAM: 256 bytes
are configured like the internal memory structure of a
standard 8052, while the remaining 768 bytes can be
accessed using external memory addressing (MOVX).
The VRS51C1100 also includes a large block of 64KB
of data Flash that is mapped on the processor’s external
memory bus for read access.
F
By default, after reset the expanded RAM area and the
data Flash areas are disabled. They are enabled by
setting
(respectively) of the SYSCON register located at
address BFh in the SFR.
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IGURE
FFh
80h
7Fh
00h
VRS51C1100
6: VRS51C1100 D
(Indirect addressing only)
Upper 128 bytes RAM
Lower 128 bytes RAM
the
XRAME
ATA
(Direct addressing only)
M
SFR
EMORY STRUCTURE
and
Expanded 768 bytes
(Accessed by direct
external addressing
MOVX instruction)
mode, using the
(XRAME=1)
the
0000h
02FFh
DFLASHE
Use MOVX to Read
Use MOVX to Read
External Memory
External Memory
IF DFLASHE = 1
IF XRAME = 1
DFLASHE = 1
Mapped as
Mapped as
Data Flash
Data Flash
and
FFFFh
0000h
02FFh
bits
The DFLASHE and XRAME bits of the SYSCON
register define which area the MOVX instruction will
target:
DFLASHE
0
0
1
1
Lower 128 bytes (00h to 7Fh, Bank 0 & Bank 1)
The lower 128 bytes of data memory (from 00h to 7Fh)
is summarized as follows:
Upper 128 bytes (80h to FFh, Bank 2 & Bank 3)
The upper 128 bytes of the data memory ranging from
80h to FFh can be accessed using indirect addressing
or by using the bank mapping in direct addressing
mode.
Expanded RAM Access Using the MOVX @DPTR
Instruction (0000-02FF, Bank4-Bank15)
The 768 bytes of expanded RAM data memory
occupies addresses 0000h to 02FFh. This can be
accessed using external direct addressing (i.e. the
MOVX instruction) or bank mapping direct addressing.
When indirect
@DPTR instruction, if the address is larger than 02FFh
and the data Flash is disabled (DFLASHE=0), the
VRS51C1100 will access off-chip memory in the
external memory space using the external memory
control signals.
The MPAGE Register (Extra Read Data
Pointer)
The VRS51C1100 features a second data pointer
called MPAGE, which is dedicated to data Flash and
external RAM read access using the MOVX @Ri
(I=0,1) instruction. The MPAGE register provides the
high byte of the address, while the contents of the Ri
register provides the low byte of the address. The
operation of the MPAGE register resembles that of the
o
o
o
o
Address range 00h to 7Fh can be accessed in
direct and indirect addressing modes
Address range 00h to 1Fh includes R0-R7
register areas
Address range 20h to 2Fh is bit addressable
Address range 30h to 7Fh is not bit
addressable and can be used for general-
purpose storage
XRAME
0
1
0
1
addressing
Ext. Memory
Int. RAM
Int. Data Flash
Int. RAM
<= 2FFh
MOVX
executes the MOVX
Ext. Memory
Ext. Memory
Int. Data Flash
Int. Data Flash
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> 2FFh
MOVX