AT89C51RC2-RLTIL Atmel, AT89C51RC2-RLTIL Datasheet - Page 21

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AT89C51RC2-RLTIL

Manufacturer Part Number
AT89C51RC2-RLTIL
Description
8-bit Microcontrollers - MCU 80C31 w/4k
Manufacturer
Atmel
Datasheet

Specifications of AT89C51RC2-RLTIL

Product Category
8-bit Microcontrollers - MCU
Core
8051
Data Bus Width
8 bit
Maximum Clock Frequency
60 MHz
Program Memory Size
32 KB
Data Ram Size
1280 B
On-chip Adc
No
Operating Supply Voltage
2.7 V to 5.5 V
Package / Case
VQFP-44
Mounting Style
SMD/SMT
Interface Type
SPI, UART
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
32
Number Of Timers
3
Program Memory Type
Flash
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2.7 V

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT89C51RC2-RLTIL
Manufacturer:
ATMEL
Quantity:
5 000
4180E–8051–10/06
Table 17. AUXR1 register
AUXR1- Auxiliary Register 1(0A2h)
Reset Value = XXXX XX0X0b
Not bit addressable
Note:
ASSEMBLY LANGUAGE
Number
; Block move using dual data pointers
; Modifies DPTR0, DPTR1, A and PSW
; note: DPS exits opposite of entry state
; unless an extra INC AUXR1 is added
;
00A2
;
0000 909000MOV DPTR,#SOURCE ; address of SOURCE
0003 05A2 INC AUXR1 ; switch data pointers
0005 90A000 MOV DPTR,#DEST ; address of DEST
0008
0008 05A2 INC AUXR1 ; switch data pointers
000A E0 MOVX A,@DPTR ; get a Byte from SOURCE
000B A3 INC DPTR ; increment SOURCE address
000C 05A2 INC AUXR1 ; switch data pointers
000E F0 MOVX @DPTR,A ; write the Byte to DEST
000F A3 INC DPTR ; increment DEST address
0010 70F6JNZ LOOP ; check for 0 terminator
0012 05A2 INC AUXR1 ; (optional) restore DPS
Bit
7
7
6
5
4
3
2
1
0
-
1. Bit 2 stuck at 0; this allows using INC AUXR1 to toggle DPS without changing GF3.
LOOP:
AUXR1 EQU 0A2H
Mnemonic Description
ENBOOT
GF3
DPS
Bit
6
0
-
-
-
-
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Enable Boot Flash
Cleared to disable boot ROM.
Set to map the boot ROM between F800h - 0FFFFh.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
This bit is a general-purpose user flag.
Always Cleared
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Data Pointer Selection
Cleared to select DPTR0.
Set to select DPTR1.
ENBOOT
5
4
-
GF3
3
AT89C51RB2/RC2
(1)
2
0
1
-
DPS
0
21

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