W9412G6JH-5 Winbond Electronics, W9412G6JH-5 Datasheet - Page 33

• Manufacturer Part Number: W9412G6JH-5
• Description: IC DDR-400 SDRAM 128MB 66TSSOPII
• Manufacturer: Winbond Electronics

Specifications of W9412G6JH-5

• Format - Memory: RAM
• Memory Type: DDR SDRAM
• Memory Size: 128M (8Mx16)
• Speed: 200MHz
• Interface: Parallel
• Voltage - Supply: 2.3 V ~ 2.7 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 66-TSOPII
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

e. The ratio of pullup slew rate to pulldown slew rate is specified for the same temperature and
f. Verified under typical conditions for qualification purposes.
g. TSOP II package devices only.
h. Only intended for operation up to 266 Mbps per pin.
i. A derating factor will be used to increase t
j. A derating factor will be used to increase t
k. Table 3 is used to increase t
m. DQS, DM, and DQ input slew rate is specified to prevent double clocking of data and preserve
voltage, over the entire temperature and voltage range. For a given output, it represents the
maximum difference between pullup and pulldown drivers due to process variation.
0.5 V/nS as shown in Table 2. The Input slew rate is based on the lesser of the slew rates
determined by either V
rates differ, as shown in Tables 3 & 4. Input slew rate is based on the larger of AC-AC delta rise,
fall rate and DC-DC delta rise, fall rate. Input slew rate is based on the lesser of the slew rates
determined by either V
The delta rise/fall rate is calculated as:
{1/(Slew Rate1)}-{1/(slew Rate2)}
For example: If Slew Rate 1 is 0.5 V/nS and Slew Rate 2 is 0.4 V/nS, then the delta rise, fall rate is
-0.5 nS/V. Using the table given, this would result in the need for an increase in t
pS.
I/O slew rate is based on the lesser of the AC-AC slew rate and the DC-DC slew rate. The input
slew rate is based on the lesser of the slew rates determined by either V
to V
setup and hold times. Signal transitions through the DC region must be monotonic.
IL(DC)
, and similarly for rising transitions.
IH(AC)
IH(AC)
DS
to V
to V
and t
IL(AC)
IL(AC)
DH
or V
or V
in the case where the I/O slew rate is below 0.5 V/nS. The
IS
IH(DC)
DS
IH(DC)
and t
and t
- 33 -
to V
to V
IH
DH
in the case where the input slew rate is below
IL(DC)
IL(DC)
in the case where DQ, DM, and DQS slew
, similarly for rising transitions.
, similarly for rising transitions.
Publication Release Date: Apr. 02, 2010
IH(AC)
W9412G6JH
to V
DS
IL(AC)
and t
Revision A01
or V
DH
of 100
IH(DC)