NAND16GW3F2AN6E NUMONYX, NAND16GW3F2AN6E Datasheet - Page 20

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NAND16GW3F2AN6E

Manufacturer Part Number
NAND16GW3F2AN6E
Description
IC FLASH 16GBIT SLC 48TSOP
Manufacturer
NUMONYX
Datasheet

Specifications of NAND16GW3F2AN6E

Format - Memory
FLASH
Memory Type
FLASH - Nand
Memory Size
16G (2G x 8)
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Speed
-
Device operations
Figure 5.
6.1.2
20/65
RB
I/O
R
Row Add 1,2,3
code
Cmd
00h
Random data output
Cache read
The cache read operation improves the read throughput by reading data using the cache
register. As soon as the user starts to read one page, the device automatically loads the
next page into the cache register.
A Read Page command is issued prior to the first Cache Read command in a cache read
sequence. Once the Read Page command execution is terminated, the Cache Read
command can be issued as follows:
1.
2.
The two commands can be used interchangeably, in any order. When there are no more
pages to be read, the final page is copied into the cache register by issuing the Exit Cache
Read command. A Cache Read command must not be issued after the last page of the
device is read. Data output only starts after issuing the 31st command for the first time. See
Figure 6: Cache read (sequential) operation
of the two sequences.
5 Add cycles
Issue a Sequential Cache Read command to copy the next page in sequential order to
the cache register
Issue a Random Cache Read command to copy the page addressed in this command
to the cache register.
Address
inputs
(Read Busy time)
Col Add 1,2
tBLBH1
code
Cmd
30h
Main area
Busy
Data output
Spare
area
code
Cmd
05h
and
Col Add 1,2
2 Add cycles
Figure 6.1.3: Page program
Address
inputs
NAND08GW3F2A, NAND16GW3F2A
code
E0h
Cmd
Main area
Data output
Spare
area
for examples
ai08658b

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