NAND16GW3F2AN6E NUMONYX, NAND16GW3F2AN6E Datasheet - Page 16

• Manufacturer Part Number: NAND16GW3F2AN6E
• Description: IC FLASH 16GBIT SLC 48TSOP
• Manufacturer: NUMONYX

Specifications of NAND16GW3F2AN6E

• Format - Memory: FLASH
• Memory Type: FLASH - Nand
• Memory Size: 16G (2G x 8)
• Interface: Parallel
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Speed: -

Bus operations
4.5
4.6
16/65
For higher frequencies (t
considered. In this mode, data output is valid on the input/output bus for a time of t
the falling edge of Read Enable signal (see
waveforms).
See
Write protect
Write protect bus operations protect the memory against program or erase operations.
When the Write Protect signal is Low the device does not accept program or erase
operations, therefore, the contents of the memory array cannot be altered. The Write Protect
signal is not latched by Write Enable to ensure protection, even during power-up.
Standby
The memory enters standby mode by holding Chip Enable, E, High for at least 10 µs. In
standby mode, the device is deselected, outputs are disabled and power consumption is
reduced.
Table 4.
1. WP must be V
Table 5.
1. Any additional address input cycles are ignored.
2. A31 is required only for 16-Gbit devices.
Bus cycle
Command input
Bus operation
2
1
3
4
5
Address input
Table 21: AC characteristics for operations,
Write protect
nd
rd
Data output
st
th
th
Data input
Standby
Bus operations
Address insertion
I/O7
A20
A28
V
V
IH
A7
IL
IL
when issuing a program or erase command.
I/O6
V
A19
A27
V
V
V
V
RLRL
V
V
A6
E
X
IH
IL
IL
IL
IL
IL
IL
lower than 30 ns), the extended data out (EDO) mode must be
(1)
V
AL
V
V
V
X
X
I/O5
IH
A18
A26
IL
IL
IL
V
V
A5
IL
IL
V
CL
V
V
V
X
X
IH
IL
IL
IL
Figure 36: Sequential data output after read AC
I/O4
A12
A17
A25
V
A4
IL
Falling
for details on the timings requirements.
V
V
V
R
X
X
IH
IH
IH
NAND08GW3F2A, NAND16GW3F2A
I/O3
A11
A16
A24
V
A3
IL
Rising
Rising
Rising
V
W
X
X
IH
A31
I/O2
A10
A15
A23
A2
V
(2)
IL
WP
X
V
V
/V
X
X
(1)
IH
IL
DD
I/O1
A14
A22
A30
A1
A9
Data output
I/O0 - I/O7
Command
Data input
Address
RLQX
X
X
I/O0
A13
A21
A29
A0
A8
after