ESDALC6-4N4 STMicroelectronics, ESDALC6-4N4 Datasheet

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ESDALC6-4N4

Manufacturer Part Number
ESDALC6-4N4
Description
TVS Diode Arrays 7V 9.5pF ESD Array 70nA 4-Lines 6V
Manufacturer
STMicroelectronics
Series
ESDr
Datasheet

Specifications of ESDALC6-4N4

Rohs
yes
Polarity
Unidirectional
Channels
4 Channels
Breakdown Voltage
6 V
Clamping Voltage
10 V
Peak Surge Current
2.3 A
Mounting Style
SMD/SMT
Termination Style
SMD/SMT
Minimum Operating Temperature
+ 25 C
Maximum Operating Temperature
+ 25 C
Capacitance
9.5 pF
Case Height
0.38 mm
Package / Case
uQFN-4L
Peak Pulse Power Dissipation
27 W
Features
Benefits
Complies with the following standards
Applications
Where transient overvoltage protection and
electrical overstress protection in sensitive
equipment is required, such as:
Description
The ESDALC6-4N4 is monolithic array designed
to protect up to 4 lines against ESD transients. It
has been designed specifically for the protection
of the high speed interface of integrated circuits in
portable equipment and miniaturized electronics
devices. The µQFN-4L package minimizes PCB
space.
September 2012
This is information on a product in full production.
Stand-off voltage 7 V
Very low capacitance: 9.5 pF
Small package: 1.0 x 0.8 mm
Very thin package: 0.40 mm max
Low leakage current: 70 nA at 25 °C
High ESD protection level
High integration
suitable for high speed interface
IEC 61000-4-2:
– 15 kV (air discharge)
– 8 kV (contact discharge)
MIL STD 883G- Method 3015-7: class3B:
– >25 kV (human body model)
Communication systems
Cellular phone handsets and accessories
Video equipment
Portable equipment
Doc ID 022191 Rev 2
Figure 1.
ESD array with low capacitance
I/O1
I/O2
Functional diagram (top view)
ESDALC6-4N4
µQFN-4L
Datasheet
GND
production data
I/O4
I/O3
www.st.com
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ESDALC6-4N4 Summary of contents

Page 1

... Video equipment ■ Portable equipment Description The ESDALC6-4N4 is monolithic array designed to protect lines against ESD transients. It has been designed specifically for the protection of the high speed interface of integrated circuits in portable equipment and miniaturized electronics devices. The µQFN-4L package minimizes PCB space ...

Page 2

... Test conditions 8/20 µ MHz 2/11 amb Parameter (1) Parameter osc Doc ID 022191 Rev 2 ESDALC6-4N4 = 25 °C) Value 11 T initial = amb 2.3 125 -55 + 150 Slope: 1 ° ...

Page 3

... ESDALC6-4N4 Figure 3. Peak pulse power versus initial junction temperature (typical values, 8/20 µs waveform 105 115 125 135 145 155 165 175 Figure 5. Clamping voltage versus peak pulse current (typical values, 8/20 µs waveform) I (A) PP 10.0 1.0 0 Figure 7 ...

Page 4

... ESD response to IEC 6100-4-2 (+8 kV contact discharge) on each channel 5 V/div Figure 11. S21 attenuation measurement dB 0.00 -5.00 -10.00 -15.00 -20.00 -25.00 -30.00 10.0 M 100.0 k 1.0 M 4/11 Figure 10. ESD response to IEC 6100-4-2 5 V/div 20 ns/div Figure 12. Analog crosstalk measurement dB 0.00 -10.00 -20.00 -30.00 -40.00 -50.00 -60.00 -70.00 -80.00 -90.00 F/Hz -100.00 1.0 G 100.0 M 100.0k Doc ID 022191 Rev 2 ESDALC6-4N4 (-8 kV contact discharge) on each channel 20 ns/div 1.0M 10.0M 100.0M 1.0G F/Hz ...

Page 5

... ESDALC6-4N4 2 Ordering information scheme Figure 13. Ordering information scheme ESD array Low capacitance Breakdown voltage Volts min Package lines N4 = µQFN-4L Doc ID 022191 Rev 2 Ordering information scheme ESDA LC 6 4N4 5/11 ...

Page 6

... PCB. Only pin 1 mark used for this purpose. 6/11 dimensions 4L Ref. D Index e area 0.4 0.43 0.2 0.58 0.18 0.58 Doc ID 022191 Rev 2 ESDALC6-4N4 Dimensions Millimeters Min. Typ. Max. Min. A 0.31 0.38 0.40 0.012 0.015 0.016 A1 0.00 0.02 0.05 0.00 0.0008 0.002 b 0.10 0.15 0.20 0.004 0.006 0.008 D 0.70 0.80 0.90 0.028 0.031 0.035 0.50 ...

Page 7

... ESDALC6-4N4 Figure 16. Tape and reel specifications Dot identifying Pin A1 location 0.22 0.63 All dimensions are typical values in mm 2.0 4.0 0.89 User direction of unreeling Doc ID 022191 Rev 2 Package information Ø 1.55 2.0 7/11 ...

Page 8

... Manual positioning is not recommended recommended to use the lead recognition capabilities of the placement system, not the outline centering. 3. Standard tolerance of ± 0. recommended. 8/11 180 µm 580 µm Doc ID 022191 Rev 2 ESDALC6-4N4 T=100 µm and opening ratio is 100% Footprint Stencil window Footprint ...

Page 9

... ESDALC6-4N4 4. 3.5 N placement force is recommended. Too much placement force can lead to squeezed out solder paste and cause solder joints to short. Too low placement force can lead to insufficient contact between package and solder paste that could cause open solder joints or badly centered packages. ...

Page 10

... The marking can be rotated by multiples of 90° to differentiate assembly location 6 Revision history Table 5. Document revision history Date 06-Sep-2011 25-Sep-2012 10/11 Marking Package (1) µQFN-4L N Revision 1 Initial release. 2 Updated ECOPACK statement. Doc ID 022191 Rev 2 ESDALC6-4N4 Weight Base qty Delivery mode 1.17 mg 10000 Tape and reel Changes ...

Page 11

... ESDALC6-4N4 Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...

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