CY7C199CN-15PXC Cypress Semiconductor Corp, CY7C199CN-15PXC Datasheet - Page 8

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CY7C199CN-15PXC

Manufacturer Part Number
CY7C199CN-15PXC
Description
IC SRAM 256KBIT 15NS 28DIP
Manufacturer
Cypress Semiconductor Corp
Type
Asynchronousr
Datasheets

Specifications of CY7C199CN-15PXC

Memory Size
256K (32K x 8)
Package / Case
28-DIP (0.300", 7.62mm)
Format - Memory
RAM
Memory Type
SRAM - Asynchronous
Speed
15ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Access Time
15 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Current
80 mA
Organization
32 K x 8
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
- 40 C
Mounting Style
Through Hole
Number Of Ports
1
Operating Supply Voltage
5 V
Density
256Kb
Access Time (max)
15ns
Sync/async
Asynchronous
Architecture
Not Required
Clock Freq (max)
Not RequiredMHz
Operating Supply Voltage (typ)
5V
Address Bus
15b
Package Type
PDIP
Operating Temp Range
0C to 70C
Supply Current
80mA
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
28
Word Size
8b
Number Of Words
32K
Memory Configuration
32K X 8
Supply Voltage Range
4.5V To 5.5V
Memory Case Style
DIP
No. Of Pins
28
Operating Temperature Range
0°C To +70°C
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
428-2158-5
CY7C199CN-15PXC

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C199CN-15PXC
Manufacturer:
CYPRESSRESS
Quantity:
5 530
Part Number:
CY7C199CN-15PXC
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Timing Waveforms
Write Cycle 1 (WE controlled)
Write Cycle 2 (CE controlled)
Notes
Document #: 001-06435 Rev. *D
13. This cycle is WE controlled, OE is HIGH during write.
14. Data in and/or out is high impedance if OE = V
15. During this period the IOs are in output state and input signals must not be applied.
16. This cycle is CE controlled.
17. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high impedance state.
Data In/Out
Data In/Out
Address
Address
WE
WE
OE
CE
CE
Undefined
see footnotes
High Z
(continued)
[14, 16, 17]
[13, 14, 15]
t
HZOE
t
SA
IH
.
t
SA
t
AW
t
SCE
t
AW
Data-In Valid
t
t
WC
WC
Data-In Valid
t
t
t
SD
PWE
SD
t
SCE
t
t
HD
HA
t
HD
t
HA
CY7C199CN
High Z
Page 8 of 14
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