CY7C199CN-15PXC Cypress Semiconductor Corp, CY7C199CN-15PXC Datasheet

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CY7C199CN-15PXC

Manufacturer Part Number
CY7C199CN-15PXC
Description
IC SRAM 256KBIT 15NS 28DIP
Manufacturer
Cypress Semiconductor Corp
Type
Asynchronousr
Datasheets

Specifications of CY7C199CN-15PXC

Memory Size
256K (32K x 8)
Package / Case
28-DIP (0.300", 7.62mm)
Format - Memory
RAM
Memory Type
SRAM - Asynchronous
Speed
15ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Access Time
15 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Current
80 mA
Organization
32 K x 8
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
- 40 C
Mounting Style
Through Hole
Number Of Ports
1
Operating Supply Voltage
5 V
Density
256Kb
Access Time (max)
15ns
Sync/async
Asynchronous
Architecture
Not Required
Clock Freq (max)
Not RequiredMHz
Operating Supply Voltage (typ)
5V
Address Bus
15b
Package Type
PDIP
Operating Temp Range
0C to 70C
Supply Current
80mA
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
28
Word Size
8b
Number Of Words
32K
Memory Configuration
32K X 8
Supply Voltage Range
4.5V To 5.5V
Memory Case Style
DIP
No. Of Pins
28
Operating Temperature Range
0°C To +70°C
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
428-2158-5
CY7C199CN-15PXC

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C199CN-15PXC
Manufacturer:
CYPRESSRESS
Quantity:
5 530
Part Number:
CY7C199CN-15PXC
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Features
Logic Block Diagram
Product Portfolio
Cypress Semiconductor Corporation
Document #: 001-06435 Rev. *E
Maximum Access Time
Maximum Operating Current
Maximum CMOS Standby Current (low power)
Fast access time: 15 ns and 20 ns
Wide voltage range: 5.0V ± 10% (4.5V to 5.5V)
CMOS for optimum speed and power
TTL-compatible inputs and outputs
2.0 V data retention
Low CMOS standby power
Automated power down when deselected
Available in Pb-free 28-pin TSOP I, 28-pin Molded SOJ and
28-pin DIP packages
Column Decoder
RAM Array
Input Buffer
198 Champion Court
–15
500
15
80
General Description
The CY7C199CN is a high performance CMOS Asynchronous
SRAM organized as 32K by 8 bits that supports an asynchronous
memory interface. The device features an automatic power
down feature that reduces power consumption when deselected.
See the
description of read and write modes.
The CY7C199CN is available in Pb-free 28-pin TSOP I, 28-pin
Molded SOJ and 28-pin DIP package(s).
Power
Circuit
Down
256 K (32 K × 8) Static RAM
“Truth Table” on page 4
–20
500
20
75
San Jose
X
,
Unit
CA 95134-1709
mA
μA
ns
A
OE
X
I/Ox
CE
WE
[1]
in this data sheet for a complete
Revised March 17, 2011
CY7C199CN
408-943-2600
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Related parts for CY7C199CN-15PXC

CY7C199CN-15PXC Summary of contents

Page 1

... The device features an automatic power down feature that reduces power consumption when deselected. See the “Truth Table” on page 4 description of read and write modes. The CY7C199CN is available in Pb-free 28-pin TSOP I, 28-pin Molded SOJ and 28-pin DIP package(s). Input Buffer RAM Array Power ...

Page 2

... Write Cycle 2 (CE controlled) Write Cycle 3 (WE controlled, OE low) Ordering Information ...................................................... 13 Ordering Code Definitions ......................................... 13 Package Diagrams .......................................................... 14 Acronyms ........................................................................ 17 Document Conventions ................................................. 17 Units of Measure ....................................................... 17 Document History Page ................................................. 18 Sales, Solutions, and Legal Information ...................... 18 Worldwide Sales and Design Support ....................... 18 Products .................................................................... 18 PSoC Solutions ......................................................... 18 CY7C199CN .............................12 Page [+] Feedback ...

Page 3

... Pin Layout and Specifications 28 DIP Note 1. For best practices recommendations, refer to the Cypress application note System Design Guidelines on www.cypress.com. Document #: 001-06435 Rev TSOP 13.4 mm CY7C199CN 28 SOJ Page [+] Feedback ...

Page 4

... WE IOx X High-Z H Data Out L Data In H High-Z Selected, Outputs Disabled Description 0°C to 70°C –40°C to 85°C CY7C199CN SOJ TSOP 10, 11, 12, 13, 14, 15, 16, 17 18, 19, 20, 22, 23, 24, 25, 18 Mode Power Deselect/Power Down Stand Read Active (I ...

Page 5

... V , Output Disabled – ≤ V – Conditions T = 25° MHz 5 Conditions TSOP I Still air, soldered × 4.5 88.6 square inch, two–layer printed circuit board 21.94 CY7C199CN –15 –20 Unit Max Min Max V + 0 0.8 –0.5 0.8 V – 2.4 – ...

Page 6

... Resistor 3 R4 Resistor 4 R Resistor Thevenin TH V Voltage Thevenin TH Note 3. Tested initially and after any design or process change that may affect these parameters. Document #: 001-06435 Rev jig ita Description CY7C199CN & Nom Unit Ω 480 255 480 255 167 1.73 V Page ...

Page 7

... Condition = 2 ≥ – 0 ≥ V ≤ 0 – 0 less than less than t , and t HZCE LZCE HZOE LZOE “” on page 5. Transitions are measured ± 200 mV from steady state voltage. CY7C199CN –20 Unit Max 20 – ns – – ns – – – ns – – ns – ...

Page 8

... Timing Waveforms Data Retention Waveform CDR CE [9, 10] Read Cycle 1 Address Data Out Previous Data Valid Document #: 001-06435 Rev. *E DATA RETENTION MODE OHA CY7C199CN t R Data Valid Page [+] Feedback ...

Page 9

... Notes 9. Device is continuously selected CE HIGH for read cycle. 11. This cycle is OE controlled and WE is HIGH read cycle. 12. Address valid before or similar with CE transition LOW. Document #: 001-06435 Rev ACE t DOE t LZOE Data Valid t LZCE t PU 50% CY7C199CN t HZCE t HZOE High 50% Page [+] Feedback ...

Page 10

... Timing Waveforms (continued) [13, 14, 15] Write Cycle 1 (WE controlled) Address HZOE Undefined Data In/Out see footnotes Document #: 001-06435 Rev SCE PWE Data-In Valid CY7C199CN t HA Page [+] Feedback ...

Page 11

... During this period the IOs are in output state and input signals must not be applied. 16. This cycle is CE controlled. 17 goes HIGH simultaneously with WE going HIGH, the output remains in a high impedance state. Document #: 001-06435 Rev SCE Data-In Valid . CY7C199CN High Z Page [+] Feedback ...

Page 12

... OE low) Address Data Undefined In Out see footnotes Note 18. The cycle is WE controlled, OE LOW. The minimum write cycle time is the sum of t Document #: 001-06435 Rev. *E [18 SCE PWE t SD Data In Valid t HZWE and t . HZWE SD CY7C199CN Undefined See Footnotes t LZWE Page [+] Feedback ...

Page 13

... Ordering Information Contact local sales representative regarding availability of these parts. Speed Package Ordering Code (ns) Diagram 15 CY7C199CN-15PXC 51-85014 CY7C199CN-15VXC 51-85031 CY7C199CNL-15VXI 51-85031 20 CY7C199CN-20ZXI 51-85071 Ordering Code Definitions Document #: 001-06435 Rev. *E Package Type 28 DIP (6.9 x 35.6 x 3.5 mm), Pb-free 28-Pin (300-Mil) Molded SOJ, Pb-free 28-Pin (300-Mil) Molded SOJ, Pb-free 28 TSOP ...

Page 14

... Package Diagrams Figure 1. 28-pin TSOP 13.4 mm), 51-85071 Document #: 001-06435 Rev. *E CY7C199CN 51-85071 *I Page [+] Feedback ...

Page 15

... Package Diagrams (continued) Figure 2. 28-pin (300 Mil) Molded SOJ, 51-85031 Document #: 001-06435 Rev. *E CY7C199CN 51-85031 *D Page [+] Feedback ...

Page 16

... Package Diagrams (continued) Document #: 001-06435 Rev. *E Figure 3. 28-pin (300 Mil) PDIP, 51-85014 CY7C199CN 51-85014 *E Page [+] Feedback ...

Page 17

... Thin Small Outline Package VFBGA Very Fine-Pitch Ball Grid Array Document #: 001-06435 Rev. *E Document Conventions Units of Measure Symbol Unit of Measure ns nano seconds V Volts µA micro Amperes mA milli Amperes mV milli Volts mW milli Watts MHz Mega Hertz pF pico Farad °C degree Celcius W Watts CY7C199CN Page [+] Feedback ...

Page 18

... Document History Page Document Title: CY7C199CN, 256 K (32 K × 8) Static RAM Document Number: 001-06435 Submission Revision ECN. Date ** 430363 See ECN *A 684342 See ECN *B 839904 See ECN *C 2896044 03/19/2010 *D 3108898 12/13/2010 *E 3198636 03/17/11 Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’ ...

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