C8051F591-IMR Silicon Labs, C8051F591-IMR Datasheet - Page 318
![no-image](/images/no-image-200.jpg)
C8051F591-IMR
Manufacturer Part Number
C8051F591-IMR
Description
8-bit Microcontrollers - MCU 50 MIPS 96 kB 8 kB SPI 2xUART
Manufacturer
Silicon Labs
Datasheet
1.C8051F585-IQR.pdf
(356 pages)
Specifications of C8051F591-IMR
Rohs
yes
Core
8051
Data Bus Width
8 bit
Processor Series
C8051
- Current page: 318 of 356
- Download datasheet (3Mb)
C8051F58x/F59x
28.3.4. Frequency Output Mode
Frequency Output Mode produces a programmable-frequency square wave on the module’s associated
CEXn pin. The capture/compare module high byte holds the number of PCA0 clocks to count before the
output is toggled. The frequency of the square wave is then defined by Equation 28.1.
Where F
PCA0MD. The lower byte of the capture/compare module is compared to the PCA0 counter low byte; on a
match, CEXn is toggled and the offset held in the high byte is added to the matched value in PCA0CPLn.
Frequency Output Mode is enabled by setting the ECOMn, TOGn, and PWMn bits in the PCA0CPMn reg-
ister. Note that the MATn bit should normally be set to 0 in this mode. If the MATn bit is set to 1, the CCFn
flag for the channel will be set when the 16-bit PCA0 counter and the 16-bit capture/compare register for
the channel are equal.
318
Note: A value of 0x00 in the PCA0CPHn register is equal to 256 for this equation.
PCA0CPLn
Write to
Reset
PCA
PCA0CPHn
Write to
is the frequency of the clock selected by the CPS2 – 0 bits in the PCA0 mode register,
0
ENB
ENB
1
PCA0
Timebase
Figure 28.6. PCA0 High-Speed Output Mode Diagram
Enable
Equation 28.1. Square Wave Frequency Output
W
M
P
1
6
n
x
C
O
M
E
n
PCA0CPLn
PCA0CPMn
C
A
P
P
n
0 0
PCA0L
C
N
A
P
n
16-bit Comparator
M
A
T
n
F
O
G
T
n
CEXn
W
M
P
n
0 x
E
C
C
F
n
PCA0CPHn
PCA0H
=
------------------------------------------ -
2 PCA0CPHn
Rev. 1.2
F
PCA
Match
Toggle
C
F
C
R
TOGn
0
1
PCA0CN
C
C
F
5
C
C
F
4
0
1
C
C
F
3
CEXn
C
C
F
2
C
C
F
1
C
C
F
0
PCA0 Interrupt
Crossbar
Port I/O
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