MAX16048ACB+T Maxim Integrated, MAX16048ACB+T Datasheet - Page 58
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MAX16048ACB+T
Manufacturer Part Number
MAX16048ACB+T
Description
Supervisory Circuits 8Ch EEPROM Prob System Manager
Manufacturer
Maxim Integrated
Series
MAX16046, MAX16048r
Datasheet
1.MAX16046ETNCK4.pdf
(70 pages)
Specifications of MAX16048ACB+T
Rohs
yes
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers
LOAD ADDRESS: This is an extension to the standard
IEEE 1149.1 instruction set to support access to the
memory in the MAX16046/MAX16048. When the LOAD
ADDRESS instruction latches into the instruction regis-
ter, TDI connects to TDO through the 8-bit memory
address test data register during the shift-DR state.
READ DATA: This is an extension to the standard IEEE
1149.1 instruction set to support access to the memory
in the MAX16046/MAX16048. When the READ DATA
instruction latches into the instruction register, TDI con-
nects to TDO through the 8-bit memory read test data
register during the shift-DR state.
WRITE DATA: This is an extension to the standard
IEEE 1149.1 instruction set to support access to the
memory in the MAX16046/MAX16048. When the WRITE
DATA instruction latches into the instruction register,
TDI connects to TDO through the 8-bit memory write
test data register during the shift-DR state.
REBOOT: This is an extension to the standard IEEE
1149.1 instruction set to initiate a software controlled
reset to the MAX16046/MAX16048. When the REBOOT
instruction latches into the instruction register, the
MAX16046/MAX16048 resets and immediately begins
the boot-up sequence.
SAVE: This is an extension to the standard IEEE 1149.1
instruction set that triggers a fault log. The current ADC
conversion results along with fault information are
saved to EEPROM depending on the configuration of
the Critical Fault Log Control register (r47h).
SETEXTRAM: This is an extension to the standard
IEEE 1149.1 instruction set that allows access to the
extended page. Extended registers include ADC con-
version results, DACOUT enables, and GPIO input/out-
put data.
RSTEXTRAM: This is an extension to the standard IEEE
1149.1 instruction set. Use RSTEXTRAM to return to the
default page and disable access to the extended page.
SETEEPADD: This is an extension to the standard IEEE
1149.1 instruction set that allows access to the EEPROM
page. Once the SETEEPADD command has been sent,
all addresses are recognized as EEPROM addresses
only. When accessing any EEPROM location, set the
address to the desired location, perform a dummy
READ DATA operation, and then set the address back
to the desired location. This primes the device for a
subsequent series of READ DATA operations.
RSTEEPADD: This is an extension to the standard IEEE
1149.1 instruction set. Use RSTEEPADD to return to the
default page and disable access to the EEPROM.
58
When the EEPROM has not been programmed using
the JTAG or I
the EN_OUT_ outputs is open-drain active-low. If it is
necessary to hold an EN_OUT_ high or low to prevent
premature startup of a power supply before the
EEPROM is programmed, connect a resistor to ground
or the supply voltage. Avoid connecting a resistor to
ground if the output is to be configured as open-drain
with a separate pullup resistor.
When V
impedance until V
driven low. All other outputs are high impedance until
V
copied into register memory, and after which the out-
puts assume their programmed states.
The MAX16046/MAX16048 can margin or shift the volt-
ages on external power supplies to facilitate prototyp-
ing or manufacturing tests. There are several different
ways to margin power supplies: One method feeds a
current into the feedback node of a DC-DC converter or
LDO, and another method feeds a current into the trim
input on a DC-DC module.
See Figure 15 for the connections of the MAX16046/
MAX16048 to a power supply using the feedback node
method. The output voltage, V
using the following formula:
where V
power supply and V
the MAX16046/MAX16048 DACOUT_ output.
Select R
with no trim in effect (V
range bits such that V
within the DACOUT_ output range (see the DAC
Outputs section). The resistor, R
control that the DACOUT_ voltage has on the output
voltage of the power supply. Large values of R
spond to a higher degree of resolution control over the
output voltage, and small values of R
lesser degree of resolution control.
CC
reaches 2.85V, when the EEPROM contents are
V
CC
OUT
1
REF
and R
is ramped from 0V, the RESET output is high
=
is the internal reference voltage of the
Unprogrammed Device Behavior
2
V
C interface, the default configuration of
Applications Information
REF
2
Device Behavior at Power-Up
CC
to obtain the desired output voltage
⎛
⎜
⎜
⎝
1
DACOUT_
Margining Power Supplies
reaches 1.4V, at which point it is
+
REF
DACOUT_
R
R
3
1
+
falls approximately halfway
R
R
1
2
is the output voltage of
OUT
⎞
⎟
⎟
⎠
3
= V
, varies the amount of
−
, can be calculated
R
R
Feedback Method
3
1
REF
3
V
correspond to a
DACOUT_
). Set the DAC
3
corre-