MAX16048ACB+T Maxim Integrated, MAX16048ACB+T Datasheet - Page 35

• Manufacturer Part Number: MAX16048ACB+T
• Description: Supervisory Circuits 8Ch EEPROM Prob System Manager
• Manufacturer: Maxim Integrated
• Series: MAX16046, MAX16048r

Specifications of MAX16048ACB+T

• Rohs: yes

The MAX16046/MAX16048 feature an 8-bit DAC with 12
outputs (MAX16046) or 8 outputs (MAX16048) for volt-
age margining. Program the voltage on the DAC out-
puts (DACOUT1–DACOUT12) to trim external
power-supply voltages, by connecting through a series
resistor to the feedback node or to the trim input. DAC
outputs are high impedance during power-up to pre-
vent improper operation of the external power supplies
and must be explicitly enabled by setting the appropri-
ate DACOUT_ enable bits.
Each DACOUT output has three voltage ranges: 0.4V to
0.8V, 0.6V to 1.2V, and 0.8V to 1.6V. Configure DAC
outputs using registers r12h to r14h (see Table 16).
Calculate DACOUT_ voltages, V
lowing equation:
where DAC
racy and DAC
listed in the Electrical Characteristics table and 07h <
DAC
Table 15. Power-Good (PG) Thresholds
System Managers with Nonvolatile Fault Registers
REGISTER/
n
ADDRESS
EEPROM
V
< F8h.
DACOUT_
64h
12-Channel/8-Channel EEPROM-Programmable
ACC
RNG
is the DAC center code absolute accu-
= DAC
(DAC
is the DAC output voltage range as
RNG
ACC
BIT RANGE
[1:0]
[3:2]
[5:4]
[7:6]
)/255) (V)
(V) + ((DAC
DACOUT_
DAC Outputs
n
00 = PG is asserted when monitored V
01 = PG is asserted when monitored V
10 = PG is asserted when monitored V
11 = PG is asserted when monitored V
00 = PG is asserted when monitored V
01 = PG is asserted when monitored V
10 = PG is asserted when monitored V
11 = PG is asserted when monitored V
00 = PG is asserted when monitored V
01 = PG is asserted when monitored V
10 = PG is asserted when monitored V
11 = PG is asserted when monitored V
00 = PG is asserted when monitored V
01 = PG is asserted when monitored V
10 = PG is asserted when monitored V
11 = PG is asserted when monitored V
, using the fol-
- 80h) x
Set any DACOUT_ range configuration register to 00h
to switch off the DACOUT buffer. Set the DACOUT_
enable bit to ‘0’ to leave the DAC output as high imped-
ance. See Table 16 for the registers associated with the
DAC output ranges.
The DAC enable bits are not copied from EEPROM dur-
ing the boot phase; therefore each DACOUT_ output
must be enabled in the r1Ch and r1Dh registers, locat-
ed in the extended page, following power-up. See
Table 17 for the DAC enable bits.
To control the voltage on a particular DAC output, write
the 8-bit binary value to the appropriate output regis-
ter; see Table 18 for the register locations. Although
these registers are located in the default page, they
are not stored in nonvolatile EEPROM and are set to ‘0’
after a POR.
DESCRIPTION
MON1
MON1
MON1
MON1
MON2
MON2
MON2
MON2
MON3
MON3
MON3
MON3
MON4
MON4
MON4
MON4
is 95% of V
is 92.5% of V
is 90% of V
is 87.5% of V
is 95% of V
is 92.5% of V
is 90% of V
is 87.5% of V
is 95% of V
is 92.5% of V
is 90% of V
is 87.5% of V
is 95% of V
is 92.5% of V
is 90% of V
is 87.5% of V
INS1
INS1
INS2
INS2
INS3
INS3
INS4
INS4
INS1
INS1
INS2
INS2
INS3
INS3
INS4
INS4
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