MAX6708YKA+T Maxim Integrated, MAX6708YKA+T Datasheet - Page 22

• Manufacturer Part Number: MAX6708YKA+T
• Description: Supervisory Circuits uP Supervisor
• Manufacturer: Maxim Integrated
• Series: MAX6701, MAX6701A, MAX6702, MAX6702A, MAX6703, MAX6703A, MAX6704, MAX6705, MAX6705A, MAX6706, MAX6706A, MAX6707, MAX6707A, MAX6708r

Specifications of MAX6708YKA+T

• Rohs: yes
• Number Of Voltages Monitored: 1
• Monitored Voltage: 2.5 V, 3 V, 3.3 V, 5 V
• Undervoltage Threshold: 2.12 V
• Overvoltage Threshold: 2.25 V
• Output Type: Active High, Active Low, Push-Pull
• Manual Reset: Resettable
• Watchdog: No Watchdog
• Battery Backup Switching: No Backup
• Power-up Reset Delay (typ): 300 ms
• Supply Voltage - Max: 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: SOT-23
• Chip Enable Signals: No
• Maximum Power Dissipation: 714 mW
• Minimum Operating Temperature: - 40 C
• Power Fail Detection: Yes
• Supply Current (typ): 6 uA
• Supply Voltage - Min: 1.2 V

Low-Power, 8-Channel,
Serial 12-Bit ADCs
Figure 20. MAX186/MAX188 Assembly-Code Listing (continued)
22
***** Initialize QSPI Command RAM *****
***** Initialize QSPI Transmit RAM *****
READ186:
;This routine triggers the QSPI microsequencer to autonomously
;trigger conversions on all 8 channels of the MAX186. Each
;conversion result is stored in the receive data RAM.
***** Interrupts/Exceptions *****
BDM: BGND
______________________________________________________________________________________
LDD
STD
LDAA
STAA
LDAA
STAA
STAA
STAA
STAA
STAA
STAA
STAA
LDAA
STAA
LDD
LDD
LDD
LDD
LDD
LDD
LDD
LDD
LDD
PULB
PULA
RTS
PSHA
LDAA
ORAA
STAA
PULA
RTS
SPCR2
#$0800
#$008F
#$00CF
#$009F
#$00DF
#$00AF
#$00EF
#$00BF
#$00FF
#$0000
$FD40
$FD41
$FD42
$FD43
$FD44
$FD45
$FD46
$FD47
$FD48
SPCR1
#$80
#$C0
#$40
#$80
SPCR1
;exception vectors point here
;CONT=1,BITSE=0,DT=0,DSCK=0,PCS0=ACTIVE
;CONT=0,BITSE=1,DT=0,DSCK=0,PCS0=ACTIVE
;CONT=1,BITSE=1,DT=0,DSCK=0,PCS0=ACTIVE
;store first byte in COMMAND RAM
;just set SPE
;set ENDQP to $8 for 9 transfers
;set delay between transfers
STD
STD
STD
STD
STD
STD
STD
STD
STD
$FD20
$FD22
$FD24
$FD26
$FD28
$FD2A
$FD2C
$FD2E
$FD30