MAX6708YKA+T Maxim Integrated, MAX6708YKA+T Datasheet - Page 21

• Manufacturer Part Number: MAX6708YKA+T
• Description: Supervisory Circuits uP Supervisor
• Manufacturer: Maxim Integrated
• Series: MAX6701, MAX6701A, MAX6702, MAX6702A, MAX6703, MAX6703A, MAX6704, MAX6705, MAX6705A, MAX6706, MAX6706A, MAX6707, MAX6707A, MAX6708r

Specifications of MAX6708YKA+T

• Rohs: yes
• Number Of Voltages Monitored: 1
• Monitored Voltage: 2.5 V, 3 V, 3.3 V, 5 V
• Undervoltage Threshold: 2.12 V
• Overvoltage Threshold: 2.25 V
• Output Type: Active High, Active Low, Push-Pull
• Manual Reset: Resettable
• Watchdog: No Watchdog
• Battery Backup Switching: No Backup
• Power-up Reset Delay (typ): 300 ms
• Supply Voltage - Max: 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: SOT-23
• Chip Enable Signals: No
• Maximum Power Dissipation: 714 mW
• Minimum Operating Temperature: - 40 C
• Power Fail Detection: Yes
• Supply Current (typ): 6 uA
• Supply Voltage - Min: 1.2 V

Figure 20. MAX186/MAX188 Assembly-Code Listing
*Title : MAX186.ASM
* Description :
*
*
*
*
* Roger J.A. Chen, Applications Engineer
* MAXIM Integrated Products
* November 20, 1992
*
******************************************************************************************************************************************************
MAIN:
MAINLOOP:
WAIT:
ENDPROGRAM:
INITQSPI:
;This routine sets up the QSPI microsequencer to operate on its own.
;The sequencer will read all eight channels of a MAX186/MAX188 each time
;it is triggered. The A/D converter results will be left in the
;receive data RAM. Each 16 bit receive data RAM location will
;have a leading zero, 12 bits of conversion result and three zeros.
;
;Receive RAM Bits 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
;A/D Result
***** Initialize the QSPI Registers ******
INCLUDE
INCLUDE
INCLUDE
ORG
INCLUDE ‘INITSYS.ASM’
INCLUDE ‘INITRAM.ASM’
JSR
JSR
LDAA
ANDA
BEQ
BRA MAINLOOP
PSHA
PSHB
LDAA
STAA
LDAA
STAA
LDAA
STAA
LDD
STD
LDD
STD
This is a shell program for using a stand-alone 68HC16 without any external memory. The internal 1K RAM
is put into bank $0F to maintain 68HC11 code compatibility. This program was written with software
provided in the Motorola 68HC16 Evaluation Kit.
INITQSPI
READ186
SPCR0
SPCR1
#$8008
#$0000
WAIT
$0200
QPDR
QPAR
QDDR
SPSR
#%01111000
#%01111011
#%01111110
#$80
‘EQUATES.ASM’ ;Equates for common reg addrs
‘ORG00000.ASM’ ;initialize reset vector
‘ORG00008.ASM’ ;initialize interrupt vectors
0 MSB
______________________________________________________________________________________
;idle state for PCS0-3 = high
;assign port D to be QSPI
;only MISO is an input
;master mode,16 bits/transfer,
;CPOL=CPHA=0,1MHz Ser Clock
;set delay between PCS0 and SCK,
;turn on internal SRAM at $10000
;start program after interrupt vectors
;set EK=F,XK=0,YK=0,ZK=0
;set sys clock at 16.78 MHz, COP off
;set stack (SK=1, SP=03FE)
;wait for QSPI to finish
LSB 0 0 0
Low-Power, 8-Channel,
Serial 12-Bit ADCs
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