MAX6708YKA+T Maxim Integrated, MAX6708YKA+T Datasheet - Page 19

• Manufacturer Part Number: MAX6708YKA+T
• Description: Supervisory Circuits uP Supervisor
• Manufacturer: Maxim Integrated
• Series: MAX6701, MAX6701A, MAX6702, MAX6702A, MAX6703, MAX6703A, MAX6704, MAX6705, MAX6705A, MAX6706, MAX6706A, MAX6707, MAX6707A, MAX6708r

Specifications of MAX6708YKA+T

• Rohs: yes
• Number Of Voltages Monitored: 1
• Monitored Voltage: 2.5 V, 3 V, 3.3 V, 5 V
• Undervoltage Threshold: 2.12 V
• Overvoltage Threshold: 2.25 V
• Output Type: Active High, Active Low, Push-Pull
• Manual Reset: Resettable
• Watchdog: No Watchdog
• Battery Backup Switching: No Backup
• Power-up Reset Delay (typ): 300 ms
• Supply Voltage - Max: 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: SOT-23
• Chip Enable Signals: No
• Maximum Power Dissipation: 714 mW
• Minimum Operating Temperature: - 40 C
• Power Fail Detection: Yes
• Supply Current (typ): 6 uA
• Supply Voltage - Min: 1.2 V

Figure 15. MAX186/MAX188 Unipolar Transfer Function,
4.096V = Full Scale
Using the buffered REFADJ input avoids external
buffering of the reference. To use the direct VREF input,
disable the internal buffer by tying REFADJ to V
Figure 15 depicts the nominal, unipolar input/output
(I/O) transfer function, and Figure 16 shows the bipolar
input/output transfer function. Code transitions occur
halfway between successive integer LSB values. Output
coding is binary with 1 LSB = 1.00mV (4.096V/4096) for
unipolar operation and 1 LSB = 1.00mV ((4.096V/2 -
-4.096V/2)/4096) for bipolar operation.
Figure 17, the MAX186 Reference-Adjust Circuit, shows
how to adjust the ADC gain in applications that use the
internal reference. The circuit provides ±1.5%
(±65LSBs) of gain adjustment range.
For best performance, use printed circuit boards.
Wire-wrap boards are not recommended. Board layout
should ensure that digital and analog signal lines are
separated from each other. Do not run analog and digi-
tal (especially clock) lines parallel to one another, or
digital lines underneath the ADC package.
Figure 18 shows the recommended system ground
connections. A single-point analog ground (“star”
ground point) should be established at AGND, sepa-
rate from the logic ground. All other analog grounds
11 . . . 111
11 . . . 110
00 . . . 011
00 . . . 010
11 . . . 101
00 . . . 001
00 . . . 000
OUTPUT CODE
0
Transfer Function and Gain Adjust
1
Layout, Grounding, Bypassing
INPUT VOLTAGE (LSBs)
2
______________________________________________________________________________________
3
FULL-SCALE
TRANSITION
FS - 3/2LSB
1LSB = FS
FS = +4.096V
FS
DD
4096
.
and DGND should be connected to this ground. No
other digital system ground should be connected to
this single-point analog ground. The ground return to
the power supply for this ground should be low imped-
ance and as short as possible for noise-free operation.
High-frequency noise in the V
affect the high-speed comparator in the ADC. Bypass
these supplies to the single-point analog ground with
0.1µF and 4.7µF bypass capacitors close to the
MAX186/MAX188. Minimize capacitor lead lengths for
best supply-noise rejection. If the +5V power supply is
very noisy, a 10Ω resistor can be connected as a low-
pass filter, as shown in Figure 18.
Figure 16. MAX186/MAX188 Bipolar Transfer Function,
±4.096V/2 = Full Scale
Figure 17. MAX186 Reference-Adjust Circuit
Low-Power, 8-Channel,
011 . . . 111
011 . . . 110
000 . . . 010
000 . . . 001
000 . . . 000
111 . . . 111
111 . . . 110
111 . . . 101
100 . . . 001
100 . . . 000
100k
Serial 12-Bit ADCs
+5V
24k
-FS
1LSB = +4.096
FS = +4.096
2
4096
510k
0.01µF
INPUT VOLTAGE (LSBs)
DD
12
0V
power supply may
MAX186
REFADJ
+FS - 1LSB
19